Inventor

TAKEMAE YOSHIHIRO

JP157 patents

⚠️ This page may combine multiple inventors who share the name “TAKEMAE YOSHIHIRO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

TAKEMAE YOSHIHIRO

FUJITSU LTD

Semiconductor memory system using a clock-synchronous semiconductor device and semiconductor memory device for use in the same

Semiconductor memory device formed of a SOI-type transistor and a capacitor

Semiconductor memory device capable of reducing power consumption in self-refresh operation

Semiconductor memory device capable of reducing power consumption in self-refresh operation

Semiconductor device and semiconductor system for high-speed data transfer

Semiconductor memory device and method of forming the same

Semiconductor memory having a plurality of banks usable in a plurality of bank configurations

Semiconductor integrated circuit with input/output interface adapted for small-amplitude operation

Memory system having memory controller for controlling different types of memory chips

Memory subsystem operated in synchronism with a clock

Semiconductor device, semiconductor system, and digital delay circuit

Semiconductor device, semiconductor system, and digital delay circuit

Integrated circuit device

Clock synchronous semiconductor device system and semiconductor devices used with the same

System configured of synchronous semiconductor device for adjusting timing of each input and semiconductor device used therefor

Semiconductor memory device

Semiconductor memory unit having redundant structure

Semiconductor memory device having nibble mode function

Semiconductor memory device having error correction function and incorporating redundancy configuration

Semiconductor memory device with error correcting circuit

Random access memory device formed on a semiconductor substrate having an array of memory cells divided into sub-arrays

Dynamic semiconductor memory device having a simultaneous test function for divided memory cell blocks

Semiconductor memory device having extended period for outputting data

Semiconductor memory device having redundant memory and parity capabilities

Semiconductor memory device

Semiconductor devices having fuses

DRAM with reduced electric power consumption

Semiconductor integrated circuit with input/output interface adapted for small-amplitude operation

Semiconductor memory device having a dummy cell resetting the bit lines to a reset potential that is based on data read in a previous read data

Semiconductor memory device having means for replacing defective memory cells

Complementary semiconductor memory device including cell access transistor and word line driving transistor having channels of different conductivity type

Integrated circuit device

Semiconductor memory device with internal array transfer capability

Pseudo-static memory device having internal self-refresh circuit

Semiconductor memory device having stacked-capacitor type memory cells

Semiconductor memory device with shift registers for high speed reading and writing

Semiconductor memory device

Semiconductor device encapsulating a multi-chip array

Semiconductor memory device

Semiconductor integrated circuit with input/output interface adapted for small-amplitude operation

Input/output data synchronizing device

Semiconductor integrated circuit with input/output interface adapted for small-amplitude operation

Semiconductor device

DRAM with reduced electric power consumption

Semiconductor memory device having self-refresh function

Semiconductor memory device having divided regular circuits

Semiconductor memory device having stacked capacitor-type memory cells

TAKEMAE YOSHIHIRO

Switching circuit with controlled driver circuit

High electron mobility transistor circuit

FUJITSU SEMICONDUCTOR LTD

Semiconductor device and power supply apparatus