Inventor

HAN BYUNG JOON

SG72 patents

⚠️ This page may combine multiple inventors who share the name “HAN BYUNG JOON”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HAN BYUNG JOON

STATS CHIPPAC LTD

Method of mounting an integrated circuit package in an encapsulant cavity

Method of fabricating a 3-D package stacking system

Semiconductor assembly including chip scale package and second substrate with exposed surfaces on upper and lower sides

Semiconductor stacked package assembly having exposed substrate surfaces on upper and lower sides

Integrated circuit package system with an encapsulant cavity and method of fabrication thereof

Integrated circuit packaging system with stacking option and method of manufacture thereof

Chip carrier and fabrication method

Semiconductor device and method of forming electromagnetic (EM) shielding for LC circuits

Semiconductor device and method of forming embedded wafer level chip scale packages

Encapsulant cavity integrated circuit package system and method of fabrication thereof

Integrated circuit package system

Offset integrated circuit package-on-package stacking system

Integrated circuit package system with edge connection system

Offset integrated circuit package-on-package stacking system

Semiconductor device and method of forming semiconductor die with active region responsive to external stimulus

Wafer integrated with permanent carrier and method therefor

ST ASSEMBLY TEST SERVICES LTD

Stacked semiconductor packages and method for the fabrication thereof

Stacked semiconductor packages

Integrated circuit leadframe with ground plane

Method for fabricating semiconductor packages, and leadframe assemblies for the fabrication thereof

Integrated circuit package with leadframe locked encapsulation and method of manufacture therefor

AMKOR TECHNOLOGY INC

Package for stacked integrated circuits

Chip-scale semiconductor package of the fan-out type and method of manufacturing such packages

Wire bonding method and semiconductor package manufactured using the same

Semiconductor device and method of manufacturing such device

Wire bonding method for a semiconductor package

ANAM SEMICONDUCTOR INC

Lead end grid array semiconductor package

Grid array type lead frame having lead ends in different planes

Semiconductor package and method for fabricating the same

Semiconductor package and assembly for fabricating the same

Method for reproducing printed circuit boards for semiconductor packages including poor quality printed circuit board units and method for fabricating semiconductor packages using the reproduced printed circuit boards

STATS CHIPPAC PTE LTD

Semiconductor device and method of forming electromagnetic (EM) shielding for LC circuits

Integrated circuit packaging system with shielding and method of manufacturing thereof

Semiconductor device and method of forming embedded wafer level chip scale packages

Semiconductor device and method of forming embedded wafer level chip scale packages

Semiconductor device and method of singulating thin semiconductor wafer on carrier along modified region within non-active region formed by irradiating energy

LUCENT TECHNOLOGIES INC

Thin packaging of multi-chip modules with enhanced thermal/power management

Electronic device package enclosed by pliant medium laterally confined by a plastic rim member

Method of packaging fragile devices with a gel medium confined by a rim member

Method and apparatus for forming fine patterns on printed circuit board

SHIM IL KWON

Integrated circuit package-on-package stacking system and method of manufacture thereof

Integrated circuit packaging system with a component in an encapsulant cavity and method of fabrication thereof

Integrated circuit package to package stacking system

HAN BYUNG JOON

Integrated circuit packaging system with vertical interconnects and method of manufacture thereof

Semiconductor device and method of forming semiconductor die with active region responsive to external stimulus

Semiconductor device and method of singulating thin semiconductor wafer on carrier along modified region within non-active region formed by irradiating energy

CHOW SENG GUAN

Bridge stack integrated circuit package-on-package system

Integrated circuit package system with exposed interconnects

ST ASSEMBLY TEST SERVICE LTD

Ground plane for exposed package

ST ASSEMBLY TEST SERVICES PTE

Ground plane for exposed package