Ground plane for exposed package

Abstract

A new design is provided for the design of a leadframe of a semiconductor package. A ground plane is added to the design of the leadframe, the ground frame is located between the leadframe and the die attach paddle over which the semiconductor device is mounted.

What is claimed is:  
     
       1. A method of creating a semiconductor device package, comprising the steps of: 
       providing a semiconductor device;  
       providing a leadframe, conductive traces having been provided over the surface of said lead frame;  
       providing a ground plane, said ground plane forming a physical and thereto connected interface between said die attach paddle and said lead frame, a plane of said ground plane being interposed between a plane of said die attach paddle and a plane of said lead frame, a plane of said ground plane being parallel with a plane of said die attach paddle, a plane of said ground plane further being parallel with a plane of said lead frame;  
       depositing a layer of die attach paste over the surface of said die attach paddle;  
       mounting said semiconductor device over said layer of die attach paste, thereby mounting said semiconductor device over said die attach paddle;  
       providing first conductive interconnects between points of electrical contact on an active surface of the semiconductor die and said conductive traces having been provided over the surface of said lead frame;  
       providing second conductive interconnects between points of electrical contact on an active surface of the semiconductor die and said ground plane; and  
       providing a mold compound overlying said die attach paddle, further enclosing said ground plane, further enclosing said first and second conductive interconnects, further enclosing said lead frame by a measurable amount.  
     
     
       2. The method of  claim 1 , said first conductive interconnects being selected from the group consisting of signal wires and ground wires and power wires. 
     
     
       3. The method of  claim 1 , said second conductive interconnects comprising ground wires. 
     
     
       4. The method of  claim 1 , said physical and thereto connected interface between said die attach paddle and said lead frame comprising metal interconnects in metal strip form, a plane of said metal interconnects intersecting a plane of said die attach paddle under an angle. 
     
     
       5. The method of  claim 1 , said ground plane comprising an uninterrupted frame spatially surrounding said die attach paddle, said ground plane comprising a square or rectangular geometric shape when viewed in top view. 
     
     
       6. The method of  claim 1 , said ground plane comprising separated layers of metal spatially surrounding said die attach paddle, said ground plane comprising a square or rectangular geometric shape when viewed in top view. 
     
     
       7. A method of creating a semiconductor device package, comprising the steps of: 
       providing a semiconductor device;  
       providing a leadframe, conductive traces having been provided over the surface of said lead frame;  
       providing a ground plane, said ground plane forming a physical and thereto connected interface between said die attach paddle and said lead frame, a plane of said ground plane being interposed between a plane of said die attach paddle and a plane of said lead frame, a plane of said ground plane being parallel with a plane of said die attach paddle, a plane of said ground plane further being parallel with a plane of said lead frame;  
       depositing a layer of die attach paste over the surface of said die attach paddle;  
       mounting said semiconductor device over said layer of die attach paste, thereby mounting said semiconductor device over said die attach paddle;  
       providing first conductive interconnects between points of electrical contact on an active surface of the semiconductor die and said conductive traces having been provided over the surface of said lead frame, first conductive interconnects being selected from the group consisting of signal wires and ground wires and power wires;  
       providing second conductive interconnects between points of electrical contact on an active surface of the semiconductor die and said ground plane; and  
       providing a mold compound overlying said die attach paddle, further enclosing said ground plane, further enclosing said first and second conductive interconnects, further enclosing said lead frame by a measurable amount.  
     
     
       8. The method of  claim 7 , said second conductive interconnects comprising ground wires. 
     
     
       9. The method of  claim 7 , said physical and thereto connected interface between said die attach paddle and said lead frame comprising metal interconnects in metal strip form, a plane of said metal interconnects intersecting a plane of said die attach paddle under an angle. 
     
     
       10. The method of  claim 7 , said ground plane comprising an uninterrupted frame spatially surrounding said die attach paddle, said ground plane comprising a square or rectangular geometric shape when viewed in top view. 
     
     
       11. The method of  claim 7 , said ground plane comprising separated layers of metal spatially surrounding said die attach paddle, said ground plane comprising a square or rectangular geometric shape when viewed in top view. 
     
     
       12. A method of creating a semiconductor device package, comprising the steps of: 
       providing a semiconductor device;  
       providing a leadframe, conductive traces having been provided over the surface of said lead frame;  
       providing a ground plane, said ground plane forming a physical and thereto connected interface between said die attach paddle and said lead frame, a plane of said ground plane being interposed between a plane of said die attach paddle and a plane of said lead frame, a plane of said ground plane being parallel with a plane of said die attach paddle, a plane of said ground plane further being parallel with a plane of said lead frame;  
       depositing a layer of die attach paste over the surface of said die attach paddle;  
       mounting said semiconductor device over said layer of die attach paste, thereby mounting said semiconductor device over said die attach paddle;  
       providing first conductive interconnects between points of electrical contact on an active surface of the semiconductor die and said conductive traces having been provided over the surface of said lead frame, first conductive interconnects being selected from the group consisting of signal wires and ground wires and power wires;  
       providing second conductive interconnects between points of electrical contact on an active surface of the semiconductor die and said ground plane, said second conductive interconnects comprising ground wires; and  
       providing a mold compound overlying said die attach paddle, further enclosing said ground plane, further enclosing said first and second conductive interconnects, further enclosing said lead frame by a measurable amount.  
     
     
       13. The method of  claim 12 , said physical and thereto connected interface between said die attach paddle and said lead frame comprising metal interconnects in metal strip form, a plane of said metal interconnects intersecting a plane of said die attach paddle under an angle. 
     
     
       14. The method of  claim 12 , said ground plane comprising an uninterrupted frame spatially surrounding said die attach paddle, said ground plane comprising a square or rectangular geometric shape when viewed in top view. 
     
     
       15. The method of  claim 12 , said ground plane comprising separated layers of metal spatially surrounding said die attach paddle, said ground plane comprising a square or rectangular geometric shape when viewed in top view.