Inventor · disambiguated record
Jae Hak Yee
Also filed as: YEE JAE HAK
34 granted patents·2 pending applications·1,232 citations·filing 1999–2012
98Inventor score
Top patents by PatentIndex Score
36 records- 0197US6858919B2Semiconductor packageAMKOR TECHNOLOGY INC·Filed 2001·Granted Feb 22, 2005·130 cites·16 claims
- 0297US6448633B1Semiconductor package and method of making using leadframe having lead locks to secure leads to encapsulantAMKOR TECHNOLOGY INC·Filed 1999·Granted Sep 10, 2002·258 cites·4 claims
- 0396US6646339B1Thin and heat radiant semiconductor package and method for manufacturingAMKOR TECHNOLOGY INC·Filed 2000·Granted Nov 11, 2003·111 cites·12 claims
- 0495US6759737B2Semiconductor package including stacked chips with aligned input/output padsAMKOR TECHNOLOGY INC·Filed 2001·Granted Jul 6, 2004·105 cites·24 claims
- 0595US6677663B1End grid array semiconductor packageAMKOR TECHNOLOGY INC·Filed 2000·Granted Jan 13, 2004·100 cites·5 claims
- 0693US6521987B1Plastic integrated circuit device package and method for making the packageAMKOR TECHNOLOGY INC·Filed 2000·Granted Feb 18, 2003·104 cites·18 claims
- 0792US6953988B2Semiconductor packageAMKOR TECHNOLOGY INC·Filed 2004·Granted Oct 11, 2005·60 cites·16 claims
- 0891US6627976B1Leadframe for semiconductor package and mold for molding the sameAMKOR TECHNOLOGY INC·Filed 2000·Granted Sep 30, 2003·64 cites·20 claims
- 0989US6525406B1Semiconductor device having increased moisture path and increased solder joint strengthAMKOR TECHNOLOGY INC·Filed 2000·Granted Feb 25, 2003·69 cites·43 claims
- 1088US7622333B2Integrated circuit package system for package stacking and manufacturing method thereofSTATS CHIPPAC LTD·Filed 2006·Granted Nov 24, 2009·14 cites·5 claims
- 1188US6630373B2Ground plane for exposed packageST ASSEMBLY TEST SERVICE LTD·Filed 2002·Granted Oct 7, 2003·46 cites·15 claims
- 1286US7645638B2Stackable multi-chip package system with support structureSTATS CHIPPAC LTD·Filed 2006·Granted Jan 12, 2010·13 cites·10 claims
- 1383US6876069B2Ground plane for exposed packageST ASSEMBLY TEST SERVICES PTE·Filed 2003·Granted Apr 5, 2005·36 cites·17 claims
- 1482US6825062B2Semiconductor package and method of making using leadframe having lead locks to secure leads to encapsulantAMKOR TECHNOLOGY INC·Filed 2002·Granted Nov 30, 2004·26 cites·16 claims
- 1582US6555899B1Semiconductor package leadframe assembly and method of manufactureAMKOR TECHNOLOGY INC·Filed 2000·Granted Apr 29, 2003·34 cites·19 claims
- 1681US7968981B2Inline integrated circuit systemSTATS CHIPPAC LTD·Filed 2008·Granted Jun 28, 2011·8 cites·10 claims
- 1778US8501540B2Method for manufacture of inline integrated circuit systemYEE JAE HAK·Filed 2011·Granted Aug 6, 2013·4 cites·5 claims
- 1878US7564122B2Semiconductor package and method of making using leadframe having lead locks to secure leads to encapsulantAMKOR TECHNOLOGY INC·Filed 2006·Granted Jul 21, 2009·6 cites·19 claims
- 1977US8471374B2Integrated circuit package system with L-shaped leadfingersKIM YOUNG CHEOL·Filed 2007·Granted Jun 25, 2013·6 cites·20 claims
- 2072US7057280B2Leadframe having lead locks to secure leads to encapsulantAMKOR TECHNOLOGY INC·Filed 2003·Granted Jun 6, 2006·14 cites·18 claims
- 2170US6483177B1Leaded semiconductor packages and method of trimming and singulating such packagesST ASSEMBLY TEST SERVICES LTD·Filed 2000·Granted Nov 19, 2002·17 cites·5 claims
- 2261US8946878B2Integrated circuit package-in-package system housing a plurality of stacked and offset integrated circuits and method of manufacture thereforCHIN CHEE KEONG·Filed 2007·Granted Feb 3, 2015·4 cites·9 claims
- 2358US8847413B2Integrated circuit package system with leads having multiple sides exposedYEE JAE HAK·Filed 2008·Granted Sep 30, 2014·1 cites·20 claims
- 2454US7915738B2Stackable multi-chip package system with support structureSTATS CHIPPAC LTD·Filed 2009·Granted Mar 29, 2011·0 cites·9 claims
- 2552US8067272B2Integrated circuit package system for package stacking and manufacturing method thereofKIM YOUNG CHEOL·Filed 2009·Granted Nov 29, 2011·0 cites·15 claims
- 2651US8138591B2Integrated circuit package system with stacked dieYEE JAE HAK·Filed 2007·Granted Mar 20, 2012·0 cites·10 claims
- 2749US8810019B2Integrated circuit package system with stacked dieYEE JAE HAK·Filed 2012·Granted Aug 19, 2014·0 cites·10 claims
- 2848US8937372B2Integrated circuit package system with molded strip protrusionYEE JAE HAK·Filed 2007·Granted Jan 20, 2015·0 cites·20 claims
- 2946US6686258B2Method of trimming and singulating leaded semiconductor packagesST ASSEMBLY TEST SERVICES LTD·Filed 2002·Granted Feb 3, 2004·2 cites·3 claims
- 3045US9202776B2Stackable multi-chip package systemYEE JAE HAK·Filed 2007·Granted Dec 1, 2015·0 cites·20 claims
- 3141US8018039B2Integrated circuit package system with stacked devicesSTATS CHIPPAC LTD·Filed 2008·Granted Sep 13, 2011·0 cites·20 claims
- 3240US2004061217A1Thin and heat radiant semiconductor package and method for manufacturingFiled 2003·Application pending·0 cites
- 3337US8432026B2Stackable multi-chip package systemLEE KOO HONG·Filed 2006·Granted Apr 30, 2013·0 cites·20 claims
- 3435US8581382B2Integrated circuit packaging system with leadframe and method of manufacture thereofSHEN GUO QIANG·Filed 2010·Granted Nov 12, 2013·0 cites·10 claims
- 3534US8207015B2Integrated circuit packaging system with package-on-package and method of manufacture thereofSHEN GUO QIANG·Filed 2010·Granted Jun 26, 2012·0 cites·20 claims
- 3629US2011248391A1Integrated circuit package stacking system with lead overlap and method of manufacture thereofJIN WEI QIANG·Filed 2010·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →