Inventor

HOFFMANN THOMAS

DE111 patents

⚠️ This page may combine multiple inventors who share the name “HOFFMANN THOMAS”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HOFFMANN THOMAS

SENSEWARE INC

System, method and apparatus for building operations management

System, method and apparatus for configuring a node in a sensor network

System, method and apparatus for sensor control applications

System, method and apparatus for building operations management

System, method and apparatus for integrated building operations management

System, method and apparatus for building operations management

System, method and apparatus for sensor control applications

System, method and apparatus for configuring a node in a sensor network

System, method and apparatus for virtual building management

INTEL CORP

Method for improving transistor performance through reducing the salicide interface resistance

Method for improving transistor performance through reducing the salicide interface resistance

Increasing stress-enhanced drive current in a MOS transistor

Integrated circuit with improved channel stress properties and a method for making it

Methods of manufacturing a stressed MOS transistor structure

Gate-induced strain for MOS performance improvement

Enhancing strained device performance by use of multi narrow section layout

MIE FUJITSU SEMICONDUCTOR LTD

Method for fabricating a transistor device with a tuned dopant profile

High uniformity screen and epitaxial layers for CMOS devices

Semiconductor structure with multiple transistors having various threshold voltages

Method for fabricating a transistor with reduced junction leakage current

Method for fabricating a transistor device with a tuned dopant profile

APPLE INC

Leakage current reduction in electrical isolation gate structures

Semiconductor layout in FinFET technologies

Selectable monolithic or external scalable die-to-die interconnection system methodology

Semiconductor layout in FinFET technologies

Selectable monolithic or external scalable die-to-die interconnection system methodology

HOFFMANN THOMAS

CMOS gate stack structures and processes

Surgical cover having integrated fluid barrier

Multiple transistor types formed in a common epitaxial layer by differential out-diffusion from a doped underlayer

Integrated interoperable tools system and method for test delivery

AUDI AG

Coolant circuit for a drive device and method for operating a coolant circuit

Drive device for a motor vehicle and method for operating a drive device

Drive device for a motor vehicle and method for operating a drive device

Fluidic valve unit and method for operating a fluidic valve unit

SUVOLTA INC

Semiconductor devices having fin structures and fabrication methods thereof

Deeply depleted MOS transistors having a screening layer and methods thereof

THOMPSON SCOTT E

Transistor having reduced junction leakage and methods of forming thereof

CMOS structures and processes based on selective thinning

SEUBERT MICHAEL

Consistent set of interfaces derived from a business object model

(unassigned)

Butt joint of frame components

KIRCHNER FRAENK ROHR

Exchangeable corrugator

AIRBUS GMBH

Support device for a galley

PENNING JAN

Architectural design for expense reimbursement application software

PACHTER NIR

Architectural design for sell from stock application software

SHIFREN LUCIAN

Method for fabricating multiple transistor devices on a substrate with varying threshold voltages

JANSSEN PHARMACEUTICA NV

Trifluoromethyl alcohols as modulators of RORγt

JONES LLOYD A

Vial capper/decapper for use with a liquid transfer system

SAP SE

Change control management of continuous integration and continuous delivery

FORSCHUNGSVERBUND BERLIN EV

Optical pulse generator and method for operating an optical pulse generator

WANG LINGQUAN

Semiconductor structure with reduced junction leakage and method of fabrication thereof