Inventor

YANG WEN-KUN

TW53 patents

⚠️ This page may combine multiple inventors who share the name “YANG WEN-KUN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

YANG WEN-KUN

ADVANCED CHIP ENG TECH INC

Chip-size package structure and method of the same

Chip-size package structure and method of the same

Fan out type wafer level package structure and method of the same

Structure of image sensor module and a method for manufacturing of wafer level package

Wafer level package with die receiving through-hole and method of the same

Wafer level package with good CTE performance

Fan out type wafer level package structure and method of the same

Fan out type wafer level package structure and method of the same

Structure of image sensor module and method for manufacturing of wafer level package

FBGA and COB package structure for image sensor

Structure of dielectric layers in built-up layers of wafer level package

Sensor module package structure and method of the same

Semiconductor device package having multi-chips with side-by-side configuration and method of the same

Semiconductor image device package with die receiving through-hole and method of the same

Method for image sensor protection

RF module package for releasing stress

Method and system of trace pull test

Semiconductor device protective structure and method for fabricating the same

Image sensor module

Wafer street buffer layer

Package structure

Image sensor with a protection layer

Method and system of trace pull test

Semiconductor device protective structure and method for fabricating the same

Structure and process for WL-CSP with metal cover

Semiconductor device package with multi-chips and method of the same

Semiconductor device package having a back side protective scheme

Method for forming filling paste structure of WL package

Manufacturing tool for wafer level package and method of placing dies

Structure of image sensor module and a method for manufacturing of wafer level package

Structure of package

YANG WEN-KUN

Substrate structure with die embedded inside and dual build-up layers over both side surfaces and method of the same

Fan out type wafer level package structure and method of the same

Fan out type wafer level package structure and method of the same

Fan out type wafer level package structure and method of the same

Wafer level package with die receiving through-hole and method of the same

Semiconductor device package with die receiving through-hole and dual build-up layers over both side-surfaces for WLP and method of the same

Semiconductor device package structure and method for the same

LED chip

Substrate structure with die embedded inside and dual build-up layers over both side surfaces and method of the same

Stacking package structure with chip embedded inside and die having through silicon via and method of the same

Substrate structure with die embedded inside and dual build-up layers over both side surfaces and method of the same

Stacking package structure with chip embedded inside and die having through silicon via and method of the same

Image sensor package with dual substrates and the method of the same

(unassigned)

Wafer level package and the process of the same

Wafer level board/card assembly apparatus

Method and apparatus for wafer level burn-in

ADVANCED CHIP ENGINEERING TACH

Packaging structure with coplanar filling paste and dice and with patterned glue for WL-CSP

ADAVANCED CHIP ENGINEERING TEC

Image sensor module having build-in package cavity and the method of the same

KING DRAGON INTERNAT INC

Semiconductor device package and method of the same