Inventor · disambiguated record
Claus Reitlingshoefer
Also filed as: REITLINGSHOEFER CLAUS
6 granted patents·2 pending applications·144 citations·filing 2007–2021
82Inventor score
Top patents by PatentIndex Score
8 records- 0195US7902886B2Multiple reference phase locked loopDIABLO TECHNOLOGIES INC·Filed 2008·Granted Mar 8, 2011·67 cites·20 claims
- 0294US7796652B2Programmable asynchronous first-in-first-out (FIFO) structure with merging capabilityDIABLO TECHNOLOGIES INC·Filed 2007·Granted Sep 14, 2010·67 cites·39 claims
- 0389US10580465B2System and method for providing a configurable timing control for a memory systemRAMBUS INC·Filed 2018·Granted Mar 3, 2020·7 cites·10 claims
- 0471US9449651B2System and method for offsetting the data buffer latency of a device implementing a JEDEC standard DDR-4 LRDIMM chipsetDIABLO TECH INC·Filed 2015·Granted Sep 20, 2016·3 cites·20 claims
- 0570US11640836B2System and method for providing a configurable timing control for a memory systemRAMBUS INC·Filed 2021·Granted May 2, 2023·0 cites·20 claims
- 0665US11062743B2System and method for providing a configurable timing control for a memory systemRAMBUS INC·Filed 2020·Granted Jul 13, 2021·0 cites·20 claims
- 0744US2015310898A1System and method for providing a configurable timing control for a memory systemDIABLO TECHNOLOGIES INC·Filed 2015·Application pending·0 cites
- 0840US2016371204A1System and method for offsetting the data buffer latency of a device implementing a jedec standard ddr-4 lrdimm chipsetDIABLO TECH INC·Filed 2016·Application pending·0 cites
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →