Inventor
CHEN JHIH-BIN
TW21 patents
⚠️ This page may combine multiple inventors who share the name “CHEN JHIH-BIN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
TAIWAN SEMICONDUCTOR MFG CO LTD
19 patentsUS11437785B2Sep 6, 2022
VCSEL with self-aligned microlens to improve beam divergence
TAIWAN SEMICONDUCTOR MFG CO LTD2 citations72
US11329128B2May 10, 2022
High voltage device with gate extensions
TAIWAN SEMICONDUCTOR MFG CO LTD3 citations72
US12237647B2Feb 25, 2025
Techniques for vertical cavity surface emitting laser oxidation
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations62
US12211896B2Jan 28, 2025
High voltage device with gate extensions
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations62
US11908891B2Feb 20, 2024
High voltage device with gate extensions
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations62
US11784460B2Oct 10, 2023
Bump bonding structure to mitigate space contamination for III-V dies and CMOS dies
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations62
US11309685B2Apr 19, 2022
Techniques for vertical cavity surface emitting laser oxidation
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations62
US11211469B2Dec 28, 2021
Third generation flash memory structure with self-aligned contact and methods for forming the same
TAIWAN SEMICONDUCTOR MFG CO LTD1 citations62
US11158593B2Oct 26, 2021
Structures for bonding a group III-V device to a substrate by stacked conductive bumps
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations62
US11025033B2Jun 1, 2021
Bump bonding structure to mitigate space contamination for III-V dies and CMOS dies
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations62
US10643964B2May 5, 2020
Structures for bonding a group III-V device to a substrate by stacked conductive bumps
TAIWAN SEMICONDUCTOR MFG CO LTD1 citations62
US12255207B2Mar 18, 2025
Boundary design for high-voltage integration on HKMG technology
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations61
US11855091B2Dec 26, 2023
Boundary design for high-voltage integration on HKMG technology
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations61
US11410999B2Aug 9, 2022
Boundary design for high-voltage integration on HKMG technology
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations61
US12588429B2Mar 24, 2026
Resistive memory device including a silicon oxide base spacer and methods for forming the same
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations60
US12563804B2Feb 24, 2026
Semiconductor structure and forming method thereof
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations51
US12159870B2Dec 3, 2024
Semiconductor structure and forming method thereof
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations49
US12588256B2Mar 24, 2026
Method for manufacturing semiconductor structure and semiconductor structure thereof
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations48
US10847949B2Nov 24, 2020
Techniques for vertical cavity surface emitting laser oxidation
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations41