Techniques for vertical cavity surface emitting laser oxidation
Abstract
Some embodiments relate to a method for manufacturing a vertical cavity surface emitting laser. The method includes forming an optically active layer over a first reflective layer and forming a second reflective layer over the optically active layer. Forming a masking layer over the second reflective layer, where the masking layer leaves a sacrificial portion of the second reflective layer exposed. A first etch is performed to remove the sacrificial portion of the second reflective layer, defining a second reflector. Forming a first spacer covering outer sidewalls of the second reflector and masking layer. Performing an oxidation process to oxidize a peripheral region of the optically active layer. A second etch is performed to remove a portion of the oxidized peripheral region, defining an optically active region. Forming a second spacer covering outer sidewalls of the first spacer, the optically active region, and the first reflector.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1. A vertical cavity surface emitting laser (VCSEL) structure, comprising:
a substrate disposed over a first electrode;
a first reflector disposed over the substrate;
an optically active region over the first reflector, wherein the first reflector and the optically active region have outer sidewalls that are aligned;
a second reflector disposed over the optically active region, wherein the optically active region is optically coupled to the first and second reflectors;
a masking layer disposed over the second reflector;
a second electrode disposed over the masking layer, wherein the second electrode contains an aperture through a center of the second electrode exposing an upper surface of the masking layer;
a first spacer covering outer sidewalls of the second reflector, wherein a lower surface of the first spacer contacts an upper surface of the optically active region, wherein inner sidewalls of the first spacer comprise a first plurality of protrusions that engagedly meet a plurality of recesses in the second reflector; and
a second spacer covering outer sidewalls of the first spacer, outer sidewalls of the optically active region, and outer sidewalls of the first reflector.
2. The VCSEL structure of claim 1 , wherein a portion of the optically active region comprises an oxidation layer, wherein the oxidation layer begins on the outer sidewalls of the optically active region.
3. The VCSEL structure of claim 1 , wherein inner sidewalls of the second spacer comprise a second plurality of protrusions that engagedly meet a second plurality of recesses in the outer sidewalls of the first spacer.
4. The VCSEL structure of claim 3 , wherein inner sidewalls of the second spacer comprise a third plurality of protrusions that engagedly meet a third plurality of recesses in the first reflector and the optically active region, and wherein outer sidewalls of the second spacer comprise a plurality of recesses.
5. The VCSEL structure of claim 1 , wherein the first and second reflectors are comprised of a stack of alternating layers of two different materials with different refractive indices, wherein the stack of alternating layers comprise of a first layer and a second layer, wherein the first layer comprises Aluminum arsenide (AlAs), and wherein the second layer comprises Gallium arsenide (GaAs), wherein the second layer has a greater maximum width than the first layer, and wherein the first layer is stacked on top of the second layer.
6. The VCSEL structure of claim 1 , wherein the first spacer and the second spacer are comprised of a same material.
7. The VCSEL structure of claim 1 , wherein inner sidewalls of the first spacer are in direct contact with the outer sidewalls of the second reflector, wherein inner sidewalls of the second spacer are in direct contact with the outer sidewalls of the optically active region and the outer sidewalls of the first reflector.
8. The VCSEL structure of claim 1 , wherein the first spacer continuously extends from outer sidewalls of the masking layer to the outer sidewalls of the second reflector.
9. An integrated circuit, comprising:
a substrate disposed over a first electrode;
a first reflector disposed over the substrate, wherein the first reflector comprises a first aluminum arsenide layer, and a first gallium arsenide layer stacked over the first aluminum arsenide layer;
an optically active region over the first reflector, the optically active region comprising a central region and a peripheral region surrounding the central region, the central region comprising aluminum, and the peripheral region comprising aluminum oxide, wherein the peripheral region has outer sidewalls that are aligned with outer sidewalls of the first reflector;
a second reflector disposed over the optically active region, wherein the second reflector comprises a second aluminum arsenide layer, and a second gallium arsenide layer stacked over the second aluminum arsenide layer, wherein the optically active region is optically coupled to the first and second reflectors;
a masking layer disposed over the second reflector,
a second electrode disposed over the masking layer, wherein the second electrode contains an aperture through a center of the second electrode exposing an upper surface of the masking layer;
a first spacer covering outer sidewalls of the second reflector, wherein a lower surface of the first spacer contacts an upper surface of the peripheral region of the optically active region, wherein inner sidewalls of the first spacer directly contact outer sidewalls of the second reflector without any oxidation material separating the first spacer from the second reflector; and
a second spacer covering outer sidewalls of the first spacer, the outer sidewalls of the peripheral region of the optically active region, and the outer sidewalls of the first reflector, wherein an upper surface of the masking layer, an upper surface of the first spacer, and an upper surface of the second spacer are aligned.
10. The integrated circuit of claim 9 , wherein the inner sidewalls of the first spacer comprise a first plurality of protrusions that directly contact a plurality of recesses in the second reflector, wherein the inner sidewalls of the second spacer comprise a second plurality of protrusions that directly contact a second plurality of recesses in the outer sidewalls of the first spacer.
11. The integrated circuit of claim 10 , wherein the outer sidewalls of the second spacer comprise a third plurality of recesses spaced across a distance defined between an upper surface of the second reflector to a lower surface of the first reflector.
12. The integrated circuit of claim 9 , wherein the first spacer and the second spacer are comprised of a same material.
13. The integrated circuit of claim 9 , wherein a maximum width of the second reflector is less than a maximum width of the optically active region.
14. The integrated circuit of claim 9 , wherein inner sidewalls of the second spacer directly contact outer sidewalls of the first reflector without any oxidation material separating the second spacer from the first reflector.
15. An integrated circuit, comprising:
a substrate overlying a first electrode;
a first reflector overlying the substrate, wherein the first reflector comprises a plurality of first reflector layers including first aluminum arsenide layers alternatingly stacked between a plurality of first gallium arsenide layers;
an optically active region overlying the first reflector, wherein the optically active region comprises a central region and a peripheral region laterally surrounding the central region, the central region comprising aluminum, and the peripheral region comprising aluminum oxide, wherein the optically active region is optically coupled to the first reflector;
a second reflector disposed over the optically active region, wherein the second reflector comprises a plurality of second aluminum arsenide layers alternatingly stacked between a plurality of second gallium arsenide layers, wherein the optically active region is optically coupled to the first and second reflectors, wherein outer sidewalls of the second reflector comprise a first plurality of recesses;
a masking layer overlying the second reflector;
a second electrode overlying the masking layer, wherein the second electrode contains an aperture through a center of the second electrode, thereby exposing an upper surface of the masking layer, wherein the aperture of the second electrode directly overlies the central region of the optically active region;
a first sidewall spacer structure laterally enclosing the outer sidewalls of the second reflector, wherein a lower surface of the first sidewall spacer structure directly contacts an upper surface of the peripheral region of the optically active region, wherein inner sidewalls of the first sidewall spacer structure comprise a first plurality of protrusions that directly contact the first plurality of recesses, wherein outer sidewalls of the first sidewall spacer structure comprise a second plurality of recesses; and
a second sidewall spacer structure laterally enclosing the first sidewall spacer structure, the optically active region, and the first reflector, wherein the first and second sidewall spacer structures comprise a same material, and wherein inner sidewalls of the second sidewall spacer structure comprise a second plurality of protrusions that directly contact the second plurality of recesses.
16. The integrated circuit of claim 15 , wherein the first plurality of protrusions directly contact the first plurality of recesses without any oxidation material separating the second reflector from the first sidewall spacer structure.
17. The integrated circuit of claim 15 , wherein outer sidewalls of the first reflector and outer sidewalls of the optically active region comprise a third plurality of recesses, wherein the second plurality of protrusions of the second sidewall spacer structure directly contact the third plurality of recesses.
18. The integrated circuit of claim 17 , wherein outer sidewalls of the second sidewall spacer structure comprise a fourth plurality of recesses spaced across a vertical distance defined between an upper surface of the masking layer and a lower surface of the first reflector.
19. The integrated circuit of claim 15 , wherein the first plurality of recesses and the first plurality of protrusions directly overlie the peripheral region of the optically active region.
20. The integrated circuit of claim 15 , wherein a thickness of the optically active region is less than a thickness of the masking layer.Cited by (0)
No later patents cite this yet.
References (0)
No backward citations on record.