P

Inventor

ZUBKOV VLADIMIR

US31 patents
⚠️ This page may combine multiple inventors who share the name “ZUBKOV VLADIMIR”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LSI LOGIC CORP

20 patents
US6566262B1May 20, 2003

Method for creating self-aligned alloy capping layers for copper interconnect structures

LSI LOGIC CORP83 citations97
US6989565B1Jan 24, 2006

Memory device having an electron trapping layer in a high-K dielectric gate stack

LSI LOGIC CORP84 citations96
US6303047B1Oct 16, 2001

Low dielectric constant multiple carbon-containing silicon oxide dielectric material for use in integrated circuit structures, and method of making same

LSI LOGIC CORP81 citations96
US6858195B2Feb 22, 2005

Process for forming a low dielectric constant fluorine and carbon-containing silicon oxide dielectric material

LSI LOGIC CORP19 citations92
US6572925B2Jun 3, 2003

Process for forming a low dielectric constant fluorine and carbon containing silicon oxide dielectric material

LSI LOGIC CORP20 citations92
US6511925B1Jan 28, 2003

Process for forming high dielectric constant gate dielectric for integrated circuit structure

LSI LOGIC CORP32 citations92
US6365528B1Apr 2, 2002

Low temperature process for forming a low dielectric constant fluorine and carbon-containing silicon oxide dielectric-material characterized by improved resistance to oxidation and good gap-filling capabilities

LSI LOGIC CORP35 citations92
US6998343B1Feb 14, 2006

Method for creating barrier layers for copper diffusion

LSI LOGIC CORP26 citations90
US6673498B1Jan 6, 2004

Method for reticle formation utilizing metal vaporization

LSI LOGIC CORP7 citations74
US6627556B1Sep 30, 2003

Method of chemically altering a silicon surface and associated electrical devices

LSI LOGIC CORP7 citations74
US7132336B1Nov 7, 2006

Method and apparatus for forming a memory structure having an electron affinity region

LSI LOGIC CORP7 citations72
US7015168B2Mar 21, 2006

Low dielectric constant fluorine and carbon-containing silicon oxide dielectric material characterized by improved resistance to oxidation

LSI LOGIC CORP3 citations63
US6822308B2Nov 23, 2004

Method of chemically altering a silicon surface and associated electrical devices

LSI LOGIC CORP2 citations63
US6743474B1Jun 1, 2004

Method for growing thin films

LSI LOGIC CORP2 citations63
US6649219B2Nov 18, 2003

Process for forming a low dielectric constant fluorine and carbon-containing silicon oxide dielectric material characterized by improved resistance to oxidation

LSI LOGIC CORP4 citations63
US6747358B1Jun 8, 2004

Self-aligned alloy capping layers for copper interconnect structures

LSI LOGIC CORP2 citations62
US7115991B1Oct 3, 2006

Method for creating barriers for copper diffusion

LSI LOGIC CORP1 citations52
US7081296B2Jul 25, 2006

Method for growing thin films

LSI LOGIC CORP0 citations52
US7015096B1Mar 21, 2006

Bimetallic oxide compositions for gate dielectrics

LSI LOGIC CORP0 citations52
US6919263B2Jul 19, 2005

High-K dielectric gate material uniquely formed

LSI LOGIC CORP1 citations51

APPLIED MATERIALS INC

5 patents

BALSEANU MIHAELA

4 patents

SATO TATSUYA E

1 patent

LSI CORP

1 patent