Inventor

SLINKMAN JAMES A

US67 patents

⚠️ This page may combine multiple inventors who share the name “SLINKMAN JAMES A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SLINKMAN JAMES A

IBM

Scanning capacitance - voltage microscopy

Silicided silicon microtips for scanning probe microscopy

SOI radio frequency switch with enhanced signal fidelity and electrical isolation

Sub-lithographic imaging techniques and processes

Method of manufacturing silicided silicon microtips for scanning probe microscopy

Integrated circuit heat dissipation using nanostructures

STI stress modification by nitrogen plasma treatment for improving performance in small width devices

In-line electrical monitor for measuring mechanical stress at the device level on a semiconductor wafer

CMOS processing with low and high-current FETs

Symmetric device with contacts self aligned to gate

In-situ ion implant activation and measurement apparatus

High resistivity SOI base wafer using thermally annealed substrate

Integrated circuit heat dissipation using nanostructures

Integrated circuit heat dissipation using nanostructures

Integrated circuit heat dissipation using nanostructures

Integrated circuit heat dissipation using nanostructures

SOI radio frequency switch for reducing high frequency harmonics

STI stress modification by nitrogen plasma treatment for improving performance in small width devices

Method for forming a liner in a trench

Single-chip field effect transistor (FET) switch with silicon germanium (SiGe) power amplifier and methods of forming

Single-chip field effect transistor (FET) switch with silicon germanium (SiGe) power amplifier and methods of forming

Symmetric device with contacts self aligned to gate

CMOS device having retrograde n-well and p-well

Integrated circuit heat dissipation using nanostructures

Integrated circuit heat dissipation using nanostructures

Integrated circuit heat dissipation using nanostructures

Silicon-on-insulator heat sink

Silicon-on-insulator heat sink

Method and structure to reduce CMOS inter-well leakage

Method and structure to reduce CMOS inter-well leakage

In-line electrical monitor for measuring mechanical stress at the device level on a semiconductor wafer

DC electric field assisted anneal

High linearity SOI wafer for low-distortion circuit applications

Device modeling for proximity effects

Thin body switch transistor

Silicon-on-insulator (SOI) structure configured for reduced harmonics and method of forming the structure

Structure and method for enhanced triple well latchup robustness

Method of forming gas dielectric with support structure

Integrated circuit heat dissipation using nanostructures

Integrated circuit heat dissipation using nanostructures

BOTULA ALAN B

Method, apparatus, and design structure for silicon-on-insulator high-bandwidth circuitry with reduced charge layer

SOI radio frequency switch with enhanced electrical isolation

Noble gas implantation region in top silicon layer of semiconductor-on-insulator substrate

Silicon-on-insulator (SOI) structure configured for reduced harmonics, design structure and method

SOI radio frequency switch with enhanced electrical isolation

Silicon-on-insulator (SOI) structure configured for reduced harmonics and method of forming the structure

GRECO JOSEPH R

Semiconductor-on-insulator substrate and structure including multiple order radio frequency harmonic supressing region

GLOBALFOUNDRIES INC

Air gaps formed by porous silicon removal

INTERNAT BUSINESS MACHINES MAC

Method of forming retrograde n-well and p-well

ABOU-KHALIL MICHEL J

Lateral extended drain metal oxide semiconductor field effect transistor (LEDMOSFET) with tapered dielectric plates