Inventor

OH CHANG-WOO

KR57 patents

⚠️ This page may combine multiple inventors who share the name “OH CHANG-WOO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

OH CHANG-WOO

SAMSUNG ELECTRONICS CO LTD

Methods of forming fin field effect transistors using oxidation barrier layers

Methods of fabricating fin field transistors

Semiconductor devices and methods of fabricating the same

Integrated circuit devices and fabricating method thereof

Methods of manufacturing semiconductor devices having a support structure for an active layer pattern

Method for forming non-volatile memory devices

Methods of fabricating surrounded-channel transistors with directionally etched gate or insulator formation regions

Field effect transistor with buried gate pattern

Semiconductor devices including stress inducing layers

Semiconductor devices having a field effect transistor and methods of fabricating the same

Non-volatile memory devices

Methods of fabrication metal oxide semiconductor (MOS) transistors having buffer regions below source and drain regions

Method of fabricating fin-field effect transistors (finFETs) having different fin widths

Method of fabricating fin-field effect transistors (finfets) having different fin widths

Methods of forming semiconductor devices having multiple channel MOS transistors and related intermediate structures

Methods of forming MOSFETS using crystalline sacrificial structures

Semiconductor devices having a field effect transistor and methods of fabricating the same

Methods of forming semiconductor devices having multiple channel MOS transistors

Methods of fabricating semiconductor-on-insulator (SOI) substrates and semiconductor devices using sacrificial layers and void spaces

Method of fabricating fin-field effect transistors (finFETs) having different fin widths

Single transistor memory device having source and drain insulating regions and method of fabricating the same

Semiconductor devices including channel and junction regions of different semiconductor materials

Split gate flash memory device having self-aligned control gate and method of manufacturing the same

Method for forming multi-gate non-volatile memory devices using a damascene process

Transistor having gate dielectric layer of partial thickness difference and method of fabricating the same

Split gate flash memory device having self-aligned control gate and method of manufacturing the same

Semiconductor device employing buried insulating layer and method of fabricating the same

Method of fabricating integrated circuit devices

Memory device and method of manufacturing the same

Integrated circuit devices

Semiconductor devices having a support structure for an active layer pattern

Semiconductor devices including fin shaped semiconductor regions and stress inducing layers

Metal oxide semiconductor field effect transistors (MOSFETs) including recessed channel regions and methods of fabricating the same

Semiconductor devices and methods of fabricating the same including forming a fin with first and second gates on the sidewalls

Nonvolatile memory device and methods of forming the same

Semiconductor device employing buried insulating layer and method of fabricating the same

Metal oxide semiconductor (MOS) transistors having buffer regions below source and drain regions

Semiconductor device having partially insulated field effect transistor (PiFET) and method of fabricating the same

Methods of forming field effect transistors including raised source/drain regions

Method of manufacturing a semiconductor device

OH CHANG-WOO

Field effect transistor and method for manufacturing the same

Fin field effect transistors including oxidation barrier layers

Vertical channel fin field-effect transistors having increased source/drain contact area and methods for fabricating the same

Semiconductor device having floating body element and bulk body element

Integrated circuit devices including stress proximity effects and methods of fabricating the same

Semiconductor devices including fin shaped semiconductor regions and stress inducing layers

Semiconductor devices having a support structure for an active layer pattern

Field effect transistor and method for manufacturing the same

AMOSENSE CO LTD

Heater for cigarette-type electronic cigarette device, and cigarette-type electronic cigarette device including the same

Heat generating heater for cigarette-type electronic cigarette device