Inventor

JAKUBOWSKI FRANK

DE30 patents

⚠️ This page may combine multiple inventors who share the name “JAKUBOWSKI FRANK”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

JAKUBOWSKI FRANK

GLOBALFOUNDRIES INC

Semiconductor device including buried capacitive structures and a method of forming the same

Integrated circuits with separate workfunction material layers and methods for fabricating the same

Contact landing pads for a semiconductor device and methods of making same

Contact structure for a semiconductor device and methods of making same

Method of forming a semiconductor device structure and semiconductor device structure

MEMS capacitive pressure sensors in fully depleted semiconductor on insulator (FDSOI)

Semiconductor device including buried capacitive structures and a method of forming the same

Method of forming a semiconductor device structure and semiconductor device structure

Semiconductor device comprising self-aligned contact elements and a replacement gate electrode structure

Contact structure for a semiconductor device and methods of making same

Reduced spacer thickness in semiconductor device fabrication

Contact landing pads for a semiconductor device and methods of making same

JAKUBOWSKI FRANK

STI silicon nitride cap for flat FEOL topology

High performance HKMG stack for gate first integration

Methods of forming isolation structures for semiconductor devices by performing a deposition-etch-deposition sequence

Methods for fabricating semiconductor devices with isolation regions having uniform stepheights

Methods of recessing an active region and STI structures in a common etch process

Methods of forming isolation structures for semiconductor devices by performing a dry chemical removal process

BAARS PETER

Semiconductor device with DRAM bit lines made from same material as gate electrodes in non-memory regions of the device, and methods of making same

Semiconductor device comprising self-aligned contact elements

Method of removing gate cap materials while protecting active area

SOI semiconductor device comprising a substrate diode with reduced metal silicide leakage

INFINEON TECHNOLOGIES AG

Memory cell array and method of forming the same

Method for fabricating a semiconductor structure

Method of forming a doped portion of a semiconductor and method of forming a transistor

SCHLOESSER TILL

Semiconductor device comprising self-aligned contact elements and a replacement gate electrode structure

Replacement gate compatible eDRAM transistor with recessed channel

FAUL JUERGEN

Methods of forming bulk FinFET devices so as to reduce punch through leakage currents

NANYA TECHNOLOGY CORP

Multi-layer gate stack structure comprising a metal layer for a FET device, and method for fabricating the same

GLOBALFOUNDRIES SG PTE LTD

Wafer edge protection