Inventor

LIN YUNG-CHI

TW80 patents

⚠️ This page may combine multiple inventors who share the name “LIN YUNG-CHI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LIN YUNG-CHI

TAIWAN SEMICONDUCTOR MFG CO LTD

Dummy structure for chip-on-wafer-on-substrate

Integrated circuit packages and methods of forming the same

Integrated circuit package and method

Isolation bonding film for semiconductor packages and methods of forming the same

TSV formation processes using TSV-last approach

Method and structure of three-dimensional chip stacking

Semiconductor device having backside interconnect structure through substrate via and method of forming the same

Method for forming a semiconductor device including forming a first interconnect structure on one side of a substrate having first metal feature closer the substrate than second metal feature and forming first and second tsv on other side of substrate connecting to the metal features

Wafer bonding method

Method for forming a semiconductor device having TSV formed through a silicon interposer and a second silicon substrate with cavity covering a second die

Semiconductor structure with through substrate vias and manufacturing method thereof

Integrated circuit package and method

Methods of forming integrated circuit packages

Wafer bonding method

Semiconductor structures and methods

Method and structure of three-dimensional chip stacking

Method and structure of three-dimensional chip stacking

Dummy structure for chip-on-wafer-on-substrate

Method for forming package systems having interposers

Semiconductor device having backside interconnect structure on through substrate via and method of forming the same

Semiconductor device having backside interconnect structure on through substrate via and method of forming the same

Integrated circuit package and method

Method of forming package structure by using a wafer chuck with adjustable curved surface

Wafer bonding method

Integrated circuit packages

Semiconductor structure and manufacturing method thereof

Method of manufacturing a semiconductor device including through silicon plugs

Through via structure

Through-substrate via formation with improved topography control

Semiconductor device having backside interconnect structure on through substrate via

Isolation bonding film for semiconductor packages and methods of forming the same

Method of forming semiconductor device having backside interconnect structure on through substrate via

Through via structure and method

Interconnect structure and method of forming same

Isolation bonding film for semiconductor packages and methods of forming the same

LIN YUNG-CHI

TSV structures and methods for forming the same

Package systems having interposers with interconnection structures

Through silicon via with embedded barrier pad

Through-silicon via structure

TAIWAN SEMICONDUCTOR MFG

TSV structures and methods for forming the same

Interconnect structure and method of forming same

TSV formation processes using TSV-last approach

Method of forming package systems having interposers

YU CHEN-HUA

Semiconductor package with through silicon vias

Heat dissipation by through silicon plugs

LIN JING-CHENG

TSV formation processes using TSV-last approach

YANG KU-FENG

Cost-effective TSV formation

HU HSIEN PIN

3D IC architecture with interposer and interconnect structure for bonding dies

LIN YUNG CHI

Moving display rack

(unassigned)

Control valve for an air pressure bar