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Inventor

ZHAO DALONG

US25 patents
⚠️ This page may combine multiple inventors who share the name “ZHAO DALONG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

MIE FUJITSU SEMICONDUCTOR LTD

16 patents
US9093550B1Jul 28, 2015

Integrated circuits having a plurality of high-K metal gate FETs with various combinations of channel foundation structure and gate stack structure and methods of making same

MIE FUJITSU SEMICONDUCTOR LTD20 citations91
US9478571B1Oct 25, 2016

Buried channel deeply depleted channel transistor

MIE FUJITSU SEMICONDUCTOR LTD10 citations84
US9196727B2Nov 24, 2015

High uniformity screen and epitaxial layers for CMOS devices

MIE FUJITSU SEMICONDUCTOR LTD8 citations84
US9299698B2Mar 29, 2016

Semiconductor structure with multiple transistors having various threshold voltages

MIE FUJITSU SEMICONDUCTOR LTD7 citations83
US9112057B1Aug 18, 2015

Semiconductor devices with dopant migration suppression and method of fabrication thereof

MIE FUJITSU SEMICONDUCTOR LTD17 citations83
US9786703B2Oct 10, 2017

Buried channel deeply depleted channel transistor

MIE FUJITSU SEMICONDUCTOR LTD2 citations73
US9368624B2Jun 14, 2016

Method for fabricating a transistor with reduced junction leakage current

MIE FUJITSU SEMICONDUCTOR LTD3 citations73
US9991300B2Jun 5, 2018

Buried channel deeply depleted channel transistor

MIE FUJITSU SEMICONDUCTOR LTD0 citations52
US9105711B2Aug 11, 2015

Semiconductor structure with reduced junction leakage and method of fabrication thereof

MIE FUJITSU SEMICONDUCTOR LTD0 citations52
US10217838B2Feb 26, 2019

Semiconductor structure with multiple transistors having various threshold voltages

MIE FUJITSU SEMICONDUCTOR LTD0 citations51
US10014387B2Jul 3, 2018

Semiconductor structure with multiple transistors having various threshold voltages

MIE FUJITSU SEMICONDUCTOR LTD0 citations51
US9812550B2Nov 7, 2017

Semiconductor structure with multiple transistors having various threshold voltages

MIE FUJITSU SEMICONDUCTOR LTD0 citations51
US9793172B2Oct 17, 2017

Reducing or eliminating pre-amorphization in transistor manufacture

MIE FUJITSU SEMICONDUCTOR LTD0 citations51
US9391076B1Jul 12, 2016

CMOS structures and processes based on selective thinning

MIE FUJITSU SEMICONDUCTOR LTD1 citations51
US9385047B2Jul 5, 2016

Integrated circuits having a plurality of high-K metal gate FETs with various combinations of channel foundation structure and gate stack structure and methods of making same

MIE FUJITSU SEMICONDUCTOR LTD0 citations51
US9514940B2Dec 6, 2016

Reducing or eliminating pre-amorphization in transistor manufacture

MIE FUJITSU SEMICONDUCTOR LTD0 citations49

SCUDDER LANCE

3 patents

SUVOLTA INC

3 patents

THOMPSON SCOTT E

2 patents

WANG LINGQUAN

1 patent