Reducing or eliminating pre-amorphization in transistor manufacture

Abstract

A method for fabricating field effect transistors using carbon doped silicon layers to substantially reduce the diffusion of a doped screen layer formed below a substantially undoped channel layer includes forming an in-situ epitaxial carbon doped silicon substrate that is doped to form the screen layer in the carbon doped silicon substrate and forming the substantially undoped silicon layer above the carbon doped silicon substrate. The method may include implanting carbon below the screen layer and forming a thin layer of in-situ epitaxial carbon doped silicon above the screen layer. The screen layer may be formed either in a silicon substrate layer or the carbon doped silicon substrate.

What is claimed is: 
     
       1. A method for forming a NMOS field effect transistor (FET) in a doped well of a substrate, the NMOS FET having a source and a drain, comprising the steps of:
 forming an in-situ epitaxial carbon doped silicon layer in the doped well; 
 implanting dopants to form an NMOS anti-punchthrough layer positioned below the carbon doped silicon layer; 
 implanting dopants in the carbon doped silicon layer to form an NMOS screen layer, the NMOS screen layer being positioned laterally between eventual positions of the source and the drain; 
 annealing using a low thermal budget anneal; and 
 depositing substantially undoped epitaxial silicon layer on the carbon doped silicon layer. 
 
     
     
       2. The method of  claim 1 , wherein the first layer of in-situ epitaxial carbon doped silicon layer is operable to substantially limit diffusion of the NMOS screen layer dopants without using pre-amorphization implants. 
     
     
       3. The method of  claim 1 , further comprising forming a threshold voltage set layer positioned between the NMOS screen layer and the substantially undoped epitaxial silicon layer. 
     
     
       4. The method of  claim 1 , wherein depositing the in-situ epitaxial layer of carbon doped silicon comprises depositing a blanket epitaxial carbon doped silicon layer. 
     
     
       5. The method of  claim 1 , wherein depositing the substantially undoped epitaxial silicon layer comprises depositing a blanket epitaxial silicon layer. 
     
     
       6. The method of  claim 1 , further comprising depositing a second in-situ epitaxial carbon doped silicon layer above the NMOS screen layer before depositing the substantially undoped epitaxial silicon layer. 
     
     
       7. The method of  claim 6 , further comprising implanting carbon between the NMOS screen layer and the NMOS anti-punchthrough layer. 
     
     
       8. The method of  claim 1 , further comprising implanting carbon between the NMOS screen layer and the NMOS anti-punchthrough layer. 
     
     
       9. A method for forming a NMOS FET in a doped well of a substrate, further comprising:
 implanting dopants to form a NMOS anti-punchthrough layer; 
 implanting dopants to form a NMOS screen layer; 
 depositing an in-situ epitaxial carbon doped silicon layer above the NMOS screen layer; 
 annealing using low thermal budget anneal; and 
 depositing a substantially undoped epitaxial silicon layer on the substrate; 
 wherein the in-situ carbon doped silicon layer is operable to substantially limit diffusion of the NMOS screen layer dopants without using pre-amorphization implants. 
 
     
     
       10. The method of  claim 9 , wherein the in-situ carbon doped silicon layer has a thickness of approximately 5 nanometers. 
     
     
       11. The method of  claim 9 , further comprising implanting carbon between the NMOS screen layer and the NMOS anti-punchthrough layer. 
     
     
       12. The method of  claim 9 , further comprising forming a threshold voltage set layer positioned between the NMOS screen layer and the intrinsic epitaxial layer. 
     
     
       13. The method of  claim 9 , wherein depositing the layer of in-situ carbon doped silicon layer comprises depositing a blanket epitaxial carbon doped silicon layer. 
     
     
       14. The method of  claim 9 , wherein depositing the substantially undoped epitaxial silicon layer comprises depositing a substantially undoped blanket epitaxial silicon layer. 
     
     
       15. A method for forming an integrated circuit device in a substrate, comprising:
 forming a PMOS field effect transistor (FET) in a first doped well of the substrate, the PMOS FET having a source and a drain, forming the PMOS FET further comprising:
 implanting dopants in the first doped well to form a PMOS anti-punchthrough layer; and 
 implanting dopants in the first doped well to form a PMOS screen layer above the PMOS anti-punchthrough layer, the PMOS screen layer being positioned laterally between eventual positions of the source and the drain; and 
 
 forming a NMOS field effect transistor (FET) in a second doped well of the substrate, the NMOS FET having a source and a drain, forming the NMOS FET further comprising:
 implanting dopants in the first doped well to form a NMOS anti-punchthrough layer; 
 forming an in-situ epitaxial carbon doped silicon layer positioned above the NMOS anti-punchthrough layer, the carbon doped silicon layer being formed as a selective epitaxial layer; and 
 implanting dopants in the carbon doped silicon layer to form a NMOS screen layer, the NMOS screen layer being positioned laterally between eventual positions of the source and the drain; and 
 
 annealing using a low thermal budget anneal; and 
 forming a substantially undoped epitaxial silicon layer over the PMOS screen layer and the NMOS screen layer, the epitaxial silicon layer being formed as a blanket epitaxial layer. 
 
     
     
       16. The method of  claim 15 , further comprising performing pre-amorphization implants for the PMOS FETs to substantially limit diffusion of the PMOS screen layer dopants. 
     
     
       17. A method for forming an integrated circuit device in a substrate, comprising:
 forming a PMOS field effect transistor (FET) in a first doped well of the substrate, the PMOS FET having a source and a drain, forming the PMOS FET further comprising:
 implanting dopants in the first doped well to form a PMOS anti-punchthrough layer; and 
 implanting dopants in the first doped well to form a PMOS screen layer above the PMOS anti-punchthrough layer, the PMOS screen layer being positioned laterally between eventual positions of the source and the drain; and 
 
 forming a NMOS field effect transistor (FET) in a second doped well of the substrate, the NMOS FET having a source and a drain, forming the NMOS FET further comprising:
 implanting dopants in the first doped well to form a NMOS anti-punchthrough layer; 
 forming a first layer of carbon doped silicon positioned above the NMOS anti-punchthrough layer, the carbon doped silicon layer being formed as a selective epitaxial layer; 
 forming a second layer of silicon doped with carbon and NMOS screen layer dopants positioned above the first layer, the second layer being formed as a selective epitaxial layer; and 
 forming a third layer of carbon doped silicon positioned above the second layer, the third layer being formed as a selective epitaxial layer; 
 
 implanting dopants in the carbon doped silicon layer to form a NMOS screen layer, the NMOS screen layer being positioned laterally between eventual positions of the source and the drain; and 
 annealing using a low thermal budget anneal; and 
 forming a substantially undoped epitaxial silicon layer over the PMOS screen layer and the NMOS screen layer, the epitaxial silicon layer being formed as a blanket epitaxial layer. 
 
     
     
       18. A method for forming an integrated circuit device in a substrate, comprising:
 forming a PMOS field effect transistor (FET) in a first doped well of the substrate, the PMOS FET having a source and a drain, forming the PMOS FET further comprising:
 implanting dopants in the first doped well to form a PMOS anti-punchthrough layer; and 
 implanting dopants in the first doped well to form a PMOS screen layer above the PMOS anti-punchthrough layer, the PMOS screen layer being positioned laterally between eventual positions of the source and the drain; and 
 
 forming a NMOS field effect transistor (FET) in a second doped well of the substrate, the NMOS FET having a source and a drain, forming the NMOS FET further comprising:
 implanting dopants in the first doped well to form a NMOS anti-punchthrough layer; and 
 forming an in-situ epitaxial silicon layer doped with carbon and NMOS screen layer dopants positioned above the NMOS anti-punchthrough layer, the doped silicon layer being formed as a selective epitaxial layer; and 
 
 annealing using a low thermal budget anneal; and 
 forming a substantially undoped epitaxial silicon layer over the PMOS screen layer and the NMOS screen layer, the epitaxial silicon layer being formed as a blanket epitaxial layer.