Inventor · disambiguated record
Adam Brand
Also filed as: BRAND ADAM
23 granted patents·8 pending applications·203 citations·filing 1998–2023
95Inventor score
Files withAPPLIED MATERIALS INC9VARIAN SEMICONDUCTOR EQUIPMENT ASS INC6MAXIM INTEGRATED PRODUCTS5INTEL CORP4VARIAN SEMICONDUCTOR EQUIPMENT2
Top patents by PatentIndex Score
31 records- 0197US11908691B2Techniques to engineer nanoscale patterned features using ionsVARIAN SEMICONDUCTOR EQUIPMENT ASS INC·Filed 2022·Granted Feb 20, 2024·3 cites·7 claims
- 0297US11488823B2Techniques to engineer nanoscale patterned features using ionsVARIAN SEMICONDUCTOR EQUIPMENT ASS INC·Filed 2021·Granted Nov 1, 2022·4 cites·19 claims
- 0394US11043380B2Techniques to engineer nanoscale patterned features using ionsVARIAN SEMICONDUCTOR EQUIPMENT ASS INC·Filed 2018·Granted Jun 22, 2021·7 cites·10 claims
- 0494US9673277B2Methods and apparatus for forming horizontal gate all around device structuresAPPLIED MATERIALS INC·Filed 2015·Granted Jun 6, 2017·13 cites·19 claims
- 0592US10008384B2Techniques to engineer nanoscale patterned features using ionsVARIAN SEMICONDUCTOR EQUIPMENT ASS INC·Filed 2015·Granted Jun 26, 2018·6 cites·16 claims
- 0692US9190498B2Technique for forming a FinFET device using selective ion implantationVARIAN SEMICONDUCTOR EQUIPMENT·Filed 2013·Granted Nov 17, 2015·15 cites·7 claims
- 0789US10573744B1Self-aligned, dual-gate LDMOS transistors and associated methodsMAXIM INTEGRATED PRODUCTS·Filed 2018·Granted Feb 25, 2020·6 cites·20 claims
- 0889US9018054B2Metal gate structures for field effect transistors and method of fabricationYOSHIDA NAOMI·Filed 2013·Granted Apr 28, 2015·18 cites·8 claims
- 0985US10134585B2Low temperature atomic layer deposition of oxides on compound semiconductorsUNIV CALIFORNIA·Filed 2015·Granted Nov 20, 2018·5 cites·16 claims
- 1085US10109534B2Multi-threshold voltage (Vt) workfunction metal by selective atomic layer deposition (ALD)APPLIED MATERIALS INC·Filed 2015·Granted Oct 23, 2018·5 cites·20 claims
- 1184US10971368B2Techniques for processing substrates using directional reactive ion etchingVARIAN SEMICONDUCTOR EQUIPMENT ASS INC·Filed 2018·Granted Apr 6, 2021·3 cites·13 claims
- 1284US6287908B1Transistor device configurations for high voltage applications and improved device performanceINTEL CORP·Filed 2000·Granted Sep 11, 2001·29 cites·5 claims
- 1379US8999829B2Dual gate processAPPLIED MATERIALS INC·Filed 2013·Granted Apr 7, 2015·5 cites·17 claims
- 1478US9934981B2Techniques for processing substrates using directional reactive ion etchingVARIAN SEMICONDUCTOR EQUIPMENT ASS INC·Filed 2014·Granted Apr 3, 2018·3 cites·8 claims
- 1577US6388475B1Voltage tolerant high drive pull-up driver for an I/O bufferINTEL CORP·Filed 1999·Granted May 14, 2002·31 cites·17 claims
- 1676US6172401B1Transistor device configurations for high voltage applications and improved device performanceINTEL CORP·Filed 1998·Granted Jan 9, 2001·43 cites·12 claims
- 1774US9378941B2Interface treatment of semiconductor surfaces with high density low energy plasmaAPPLIED MATERIALS INC·Filed 2013·Granted Jun 28, 2016·3 cites·11 claims
- 1874US8864915B2Cleaning methods for improved photovoltaic module efficiencyJIA RENHE·Filed 2011·Granted Oct 21, 2014·2 cites·8 claims
- 1970US8999821B2Fin formation by epitaxial depositionAPPLIED MATERIALS INC·Filed 2014·Granted Apr 7, 2015·2 cites·20 claims
- 2067US11699753B2LDMOS transistors including vertical gates with multiple dielectric sections, and associated methodsMAXIM INTEGRATED PRODUCTS·Filed 2022·Granted Jul 11, 2023·0 cites·14 claims
- 2157US2025120143A1Extended drain transistor for high voltage applicationsINTEL CORP·Filed 2023·Application pending·0 cites
- 2257US2020243659A1Transistors with dual gate conductors, and associated methodsMAXIM INTEGRATED PRODUCTS·Filed 2020·Application pending·0 cites
- 2354US10622452B2Transistors with dual gate conductors, and associated methodsMAXIM INTEGRATED PRODUCTS·Filed 2018·Granted Apr 14, 2020·0 cites·15 claims
- 2450US11316044B2LDMOS transistors including vertical gates with multiple dielectric sections, and associated methodsMAXIM INTEGRATED PRODUCTS·Filed 2018·Granted Apr 26, 2022·0 cites·3 claims
- 2548US2012168135A1Apparatus and method for solar cell module edge cooling during laminationLINKE ROBERT C·Filed 2011·Application pending·0 cites
- 2647US9337314B2Technique for selectively processing three dimensional deviceVARIAN SEMICONDUCTOR EQUIPMENT·Filed 2013·Granted May 10, 2016·0 cites·19 claims
- 2747US2012088327A1Methods of Soldering to High Efficiency Thin Film Solar PanelsBRAND ADAM·Filed 2011·Application pending·0 cites
- 2842US2015031207A1Forming multiple gate length transistor gates using sidewall spacersAPPLIED MATERIALS INC·Filed 2014·Application pending·0 cites
- 2942US2015118832A1Methods for patterning a hardmask layer for an ion implantation processAPPLIED MATERIALS INC·Filed 2013·Application pending·0 cites
- 3040US2014273504A1Selective deposition by light exposureAPPLIED MATERIALS INC·Filed 2013·Application pending·0 cites
- 3133US2015255243A1Grazing angle plasma processing for modifying a substrate surfaceAPPLIED MATERIALS INC·Filed 2015·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →