Inventor · disambiguated record
Alex See
Also filed as: SEE ALEX · SEE ALEX K H · SEE ALEX KAI HUNG
55 granted patents·5 pending applications·1,582 citations·filing 1999–2014
99Inventor score
Files withCHARTERED SEMICONDUCTOR MFG38GLOBALFOUNDRIES SG PTE LTD9LIU HUANG3RAO XUESONG2CHARTERED SEMICONDUCTORS MANUF1
Top patents by PatentIndex Score
60 records- 0198US6303418B1Method of fabricating CMOS devices featuring dual gate structures and a high dielectric constant gate insulator layerCHARTERED SEMICONDUCTOR MFG·Filed 2000·Granted Oct 16, 2001·374 cites·28 claims
- 0296US6348385B1Method for a short channel CMOS transistor with small overlay capacitance using in-situ doped spacers with a low dielectric constantCHARTERED SEMICONDUCTOR MFG·Filed 2000·Granted Feb 19, 2002·128 cites·12 claims
- 0396US6261935B1Method of forming contact to polysilicon gate for MOS devicesCHARTERED SEMICONDUCTOR MFG·Filed 1999·Granted Jul 17, 2001·216 cites·28 claims
- 0494US6897118B1Method of multiple pulse laser annealing to activate ultra-shallow junctionsCHARTERED SEMICONDUCTOR MFG·Filed 2004·Granted May 24, 2005·105 cites·38 claims
- 0592US6365446B1Formation of silicided ultra-shallow junctions using implant through metal technology and laser annealing processCHARTERED SEMICONDUCTOR MFG·Filed 2000·Granted Apr 2, 2002·55 cites·24 claims
- 0691US6391731B1Activating source and drain junctions and extensions using a single laser annealCHARTERED SEMICONDUCTOR MFG·Filed 2001·Granted May 21, 2002·59 cites·4 claims
- 0789US6319767B1Method to eliminate top metal corner shaping during bottom metal patterning for MIM capacitors via plasma ashing and hard masking techniqueCHARTERED SEMICONDUCTOR MFG·Filed 2001·Granted Nov 20, 2001·50 cites·29 claims
- 0887US6387747B1Method to fabricate RF inductors with minimum areaCHARTERED SEMICONDUCTOR MFG·Filed 2001·Granted May 14, 2002·57 cites·29 claims
- 0987US6335253B1Method to form MOS transistors with shallow junctions using laser annealingCHARTERED SEMICONDUCTOR MFG·Filed 2000·Granted Jan 1, 2002·49 cites·13 claims
- 1086US8518775B2Integration of eNVM, RMG, and HKMG modulesLIU HUANG·Filed 2011·Granted Aug 27, 2013·12 cites·18 claims
- 1186US6355563B1Versatile copper-wiring layout design with low-k dielectric integrationCHARTERED SEMICONDUCTOR MFG·Filed 2001·Granted Mar 12, 2002·46 cites·33 claims
- 1285US6281082B1Method to form MOS transistors with a common shallow trench isolation and interlevel dielectric gap fillCHARTERED SEMICONDUCTOR MFG·Filed 2000·Granted Aug 28, 2001·52 cites·20 claims
- 1383US6624489B2Formation of silicided shallow junctions using implant through metal technology and laser annealing processCHARTERED SEMICONDUCTOR MFG·Filed 2001·Granted Sep 23, 2003·25 cites·6 claims
- 1482US6391720B1Process flow for a performance enhanced MOSFET with self-aligned, recessed channelCHARTERED SEMICONDUCTOR MFG·Filed 2000·Granted May 21, 2002·38 cites·50 claims
- 1580US9242341B2CMP head structureGLOBALFOUNDRIES SG PTE LTD·Filed 2013·Granted Jan 26, 2016·3 cites·20 claims
- 1679US6613652B2Method for fabricating SOI devices with option of incorporating air-gap feature for better insulation and performanceCHARTERED SEMICONDUCTOR MFG·Filed 2001·Granted Sep 2, 2003·28 cites·33 claims
- 1778US7030451B2Method and apparatus for performing nickel salicidationCHARTERED SEMICONDUCTOR MFG·Filed 2005·Granted Apr 18, 2006·5 cites·10 claims
- 1878US6475875B1Shallow trench isolation elevation uniformity via insertion of a polysilicon etch layerCHARTERED SEMICONDUCTOR MFG·Filed 2001·Granted Nov 5, 2002·27 cites·28 claims
- 1977US7091092B2Process flow for a performance enhanced MOSFET with self-aligned, recessed channelUNIV SINGAPORE·Filed 2002·Granted Aug 15, 2006·25 cites·28 claims
- 2075US6650220B2Parallel spiral stacked inductor on semiconductor materialCHARTERED SEMICONDUCTOR MFG·Filed 2002·Granted Nov 18, 2003·27 cites·18 claims
- 2173US8354347B2Method of forming high-k dielectric stop layer for contact hole openingGLOBALFOUNDRIES SG PTE LTD·Filed 2007·Granted Jan 15, 2013·6 cites·29 claims
- 2270US6899857B2Method for forming a region of low dielectric constant nanoporous material using a microemulsion techniqueCHARTERED SEMICONDUCTORS MANUF·Filed 2001·Granted May 31, 2005·17 cites·17 claims
- 2370US6890854B2Method and apparatus for performing nickel salicidationCHARTERED SEMICONDUCTOR MFG·Filed 2000·Granted May 10, 2005·11 cites·14 claims
- 2470US6432797B1Simplified method to reduce or eliminate STI oxide divotsCHARTERED SEMICONDUCTOR MFG·Filed 2001·Granted Aug 13, 2002·13 cites·31 claims
- 2569US8940637B2Method for forming through silicon via with wafer backside protectionLEONG LUP SAN·Filed 2012·Granted Jan 27, 2015·3 cites·11 claims
- 2668US6436833B1Method for pre-STI-CMP planarization using poly-si thermal oxidationCHARTERED SEMICONDUCTOR MFG·Filed 2001·Granted Aug 20, 2002·15 cites·25 claims
- 2767US9242338B2CMP head structureGLOBALFOUNDRIES SG PTE LTD·Filed 2013·Granted Jan 26, 2016·1 cites·20 claims
- 2866US6905964B2Method of fabricating self-aligned metal barriers by atomic layer deposition on the copper layerCHARTERED SEMICONDUCTOR MFG·Filed 2003·Granted Jun 14, 2005·13 cites·27 claims
- 2966US6468880B1Method for fabricating complementary silicon on insulator devices using wafer bondingCHARTERED SEMICONDUCTOR MFG·Filed 2001·Granted Oct 22, 2002·14 cites·14 claims
- 3066US6380066B1Methods for eliminating metal corrosion by FSGCHARTERED SEMICONDUCTOR MFG·Filed 2000·Granted Apr 30, 2002·12 cites·18 claims
- 3165US6780691B2Method to fabricate elevated source/drain transistor with large area for silicidationCHARTERED SEMICONDUCTOR MFG·Filed 2002·Granted Aug 24, 2004·12 cites·37 claims
- 3263US6492242B1Method of forming of high K metallic dielectric layerCHARTERED SEMICONDUCTOR MFG·Filed 2000·Granted Dec 10, 2002·8 cites·14 claims
- 3362US7112499B2Dual step source/drain extension junction anneal to reduce the junction depth: multiple-pulse low energy laser anneal coupled with rapid thermal annealCHARTERED SEMICONDUCTOR MFG·Filed 2004·Granted Sep 26, 2006·10 cites·24 claims
- 3460US9349654B2Isolation for embedded devicesGLOBALFOUNDRIES SG PTE LTD·Filed 2014·Granted May 24, 2016·1 cites·21 claims
- 3560US6764914B2Method of forming a high K metallic dielectric layerCHARTERED SEMICONDUCTOR MFG·Filed 2002·Granted Jul 20, 2004·6 cites·8 claims
- 3660US6734072B1Method of fabricating a MOSFET device using a spike rapid thermal oxidation procedureCHARTERED SEMICONDUCTOR MFG·Filed 2003·Granted May 11, 2004·9 cites·24 claims
- 3760US6680239B1Effective isolation with high aspect ratio shallow trench isolation and oxygen or field implantCHARTERED SEMICONDUCTOR MFG·Filed 2000·Granted Jan 20, 2004·10 cites·17 claims
- 3856US9230886B2Method for forming through silicon via with wafer backside protectionGLOBALFOUNDRIES SG PTE LTD·Filed 2014·Granted Jan 5, 2016·0 cites·17 claims
- 3955US6638365B2Method for obtaining clean silicon surfaces for semiconductor manufacturingCHARTERED SEMICONDUCTOR MFG·Filed 2001·Granted Oct 28, 2003·5 cites·17 claims
- 4051US8852968B2STI CMP under polish monitoringLI LIANG·Filed 2013·Granted Oct 7, 2014·0 cites·17 claims
- 4151US8836139B2CD controlGLOBALFOUNDRIES SG PTE LTD·Filed 2012·Granted Sep 16, 2014·0 cites·17 claims
- 4251US8415236B2Methods for reducing loading effects during film formationCHEW HAN GUAN·Filed 2009·Granted Apr 9, 2013·0 cites·20 claims
- 4351US6399471B1Assorted aluminum wiring design to enhance chip-level performance for deep sub-micron applicationCHARTERED SEMICONDUCTOR MFG·Filed 2001·Granted Jun 4, 2002·4 cites·7 claims
- 4450US9627219B2CMP wafer edge control of dielectricGLOBALFOUNDRIES SG PTE LTD·Filed 2014·Granted Apr 18, 2017·0 cites·21 claims
- 4550US9034720B2Litho scanner alignment signal improvementLIU HUI·Filed 2012·Granted May 19, 2015·0 cites·17 claims
- 4647US6727151B2Method to fabricate elevated source/drain structures in MOS transistorsCHARTERED SEMICONDUCTOR MFG·Filed 2002·Granted Apr 27, 2004·3 cites·32 claims
- 4745US6878623B2Technique to achieve thick silicide film for ultra-shallow junctionsCHARTERED SEMICONDUCTOR MFG·Filed 2003·Granted Apr 12, 2005·3 cites·25 claims
- 4844US2016114457A1Uniform polishing with fixed abrasive padGLOBALFOUNDRIES SG PTE LTD·Filed 2014·Application pending·0 cites
- 4942US6103594AMethod to form shallow trench isolationsCHARTERED SEMICONDUCTOR MFG·Filed 1999·Granted Aug 15, 2000·10 cites·20 claims
- 5040US9023725B2Filament free silicide formationGLOBALFOUNDRIES SG PTE LTD·Filed 2012·Granted May 5, 2015·0 cites·15 claims
Showing the top 50 of 60 patent records by PatentIndex Score.
Join the waitlist — get patent alerts
Get an alert when Alex See files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →