Inventor · disambiguated record
Anmol Mathur
Also filed as: MATHUR ANMOL
14 granted patents·188 citations·filing 2002–2017
93Inventor score
Technology areasG06F
Files withCALYPTO DESIGN SYSTEMS INC5CADENCE DESIGN SYSTEMS INC4CHAUHAN PANKAJ P2CALYPTO DESIGNS SYSTEMS1MENTOR GRAPHICS CORP1
Top patents by PatentIndex Score
14 records- 0187US7350168B1System, method and computer program product for equivalence checking between designs with sequential differencesCALYPTO DESIGN SYSTEMS INC·Filed 2005·Granted Mar 25, 2008·23 cites·26 claims
- 0284US7222317B1Circuit comparison by information loss matchingCALYPTO DESIGNS SYSTEMS·Filed 2004·Granted May 22, 2007·51 cites·8 claims
- 0380US7284218B1Method and system for inplace symbolic simulation over multiple cycles of a multi-clock domain designCALYPTO DESIGN SYSTEMS INC·Filed 2005·Granted Oct 16, 2007·12 cites·24 claims
- 0478US7761827B1Integrated circuit design system, method, and computer program product that takes into account observability based clock gating conditionsCALYPTO DESIGN SYSTEMS INC·Filed 2007·Granted Jul 20, 2010·10 cites·18 claims
- 0576US7673257B1System, method and computer program product for word-level operator-to-cell mappingCALYPTO DESIGN SYSTEMS INC·Filed 2007·Granted Mar 2, 2010·9 cites·26 claims
- 0676US6807651B2Procedure for optimizing mergeability and datapath widths of data flow graphsCADENCE DESIGN SYSTEMS INC·Filed 2002·Granted Oct 19, 2004·19 cites·12 claims
- 0775US6832357B2Reducing datapath widths by rebalancing data flow topologyCADENCE DESIGN SYSTEMS INC·Filed 2002·Granted Dec 14, 2004·17 cites·23 claims
- 0874US8122401B1System, method, and computer program product for determining equivalence of netlists utilizing at least one transformationCHAUHAN PANKAJ P·Filed 2008·Granted Feb 21, 2012·8 cites·24 claims
- 0974US6772398B2Reducing datapath widths responsively to upper bound on information contentCADENCE DESIGN SYSTEMS INC·Filed 2002·Granted Aug 3, 2004·16 cites·18 claims
- 1072US6772399B2Enhancing mergeability of datapaths and reducing datapath widths responsively to required precisionCADENCE DESIGN SYSTEMS INC·Filed 2002·Granted Aug 3, 2004·14 cites·25 claims
- 1170US7966593B1Integrated circuit design system, method, and computer program product that takes into account the stability of various design signalsCALYPTO DESIGN SYSTEMS INC·Filed 2007·Granted Jun 21, 2011·5 cites·23 claims
- 1262US8117571B1System, method, and computer program product for determining equivalence of netlists utilizing abstractions and transformationsCHAUHAN PANKAJ P·Filed 2008·Granted Feb 14, 2012·3 cites·27 claims
- 1357US9720859B1System, method, and computer program product for conditionally eliminating a memory read requestTRIPATHI NIKHIL·Filed 2010·Granted Aug 1, 2017·1 cites·12 claims
- 1456US10534723B1System, method, and computer program product for conditionally eliminating a memory read requestMENTOR GRAPHICS CORP·Filed 2017·Granted Jan 14, 2020·0 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →