Inventor · disambiguated record
Cheng-Lin Huang
Also filed as: HUANG CHENG · HUANG CHENG-LIN · HUANG CHENG-LIN HUANG
110 granted patents·14 pending applications·904 citations·filing 2002–2025
99Inventor score
Files withTAIWAN SEMICONDUCTOR MFG CO LTD57TAIWAN SEMICONDUCTOR MFG40LIN JING-CHENG4HUANG CHENG-LIN3KAO CHIN-FU3
Top patents by PatentIndex Score
124 records- 0198US11443957B2Metal oxide layered structure and methods of forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Sep 13, 2022·4 cites·20 claims
- 0298US8779599B2Packages including active dies and dummy dies and methods for forming the sameLIN JING-CHENG·Filed 2011·Granted Jul 15, 2014·48 cites·14 claims
- 0397US11948876B2Package structure with through viasTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Granted Apr 2, 2024·2 cites·20 claims
- 0497US10153175B2Metal oxide layered structure and methods of forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted Dec 11, 2018·14 cites·20 claims
- 0597US8999839B2Semiconductor structure having an air-gap region and a method of manufacturing the sameTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Apr 7, 2015·187 cites·20 claims
- 0697US8803337B1Integrated circuit structure having dies with connectorsTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Aug 12, 2014·32 cites·20 claims
- 0796US11456276B2Chip package structureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Sep 27, 2022·3 cites·20 claims
- 0895US9824989B2Fan-out package and methods of forming thereofTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2014·Granted Nov 21, 2017·16 cites·20 claims
- 0995US8664760B2Connector design for packaging integrated circuitsYU CHEN-HUA·Filed 2012·Granted Mar 4, 2014·18 cites·11 claims
- 1095US7193327B2Barrier structure for semiconductor devicesTAIWAN SEMICONDUCTOR MFG·Filed 2005·Granted Mar 20, 2007·43 cites·17 claims
- 1194US10361152B2Semiconductor structure having an air-gap region and a method of manufacturing the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted Jul 23, 2019·11 cites·20 claims
- 1294US9870975B1Chip package with thermal dissipation structure and method for forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted Jan 16, 2018·12 cites·20 claims
- 1394US9343419B2Bump structures for semiconductor packageTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted May 17, 2016·21 cites·13 claims
- 1494US7700479B2Cleaning processes in the formation of integrated circuit interconnect structuresTAIWAN SEMICONDUCTOR MFG·Filed 2006·Granted Apr 20, 2010·33 cites·12 claims
- 1593US10115647B2Non-vertical through-via in packageTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted Oct 30, 2018·11 cites·20 claims
- 1693US10014218B1Method for forming semiconductor device structure with bumpsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Jul 3, 2018·13 cites·20 claims
- 1793US9881908B2Integrated fan-out package on package structure and methods of forming sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted Jan 30, 2018·11 cites·18 claims
- 1893US9508666B2Packaging structures and methods with a metal pillarTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2013·Granted Nov 29, 2016·13 cites·17 claims
- 1992US8629058B2Methods for via structure with improved reliabilitySHUE SHAU-LIN·Filed 2012·Granted Jan 14, 2014·13 cites·20 claims
- 2091US11367658B2Semiconductor die singulation and structures formed therebyTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Jun 21, 2022·2 cites·20 claims
- 2191US8456009B2Semiconductor structure having an air-gap region and a method of manufacturing the sameSU SHU-HUI·Filed 2010·Granted Jun 4, 2013·19 cites·20 claims
- 2291US8304906B2Partial air gap formation for providing interconnect isolation in integrated circuitsHUANG CHENG-LIN·Filed 2010·Granted Nov 6, 2012·19 cites·20 claims
- 2391US6806192B2Method of barrier-less integration with copper alloyTAIWAN SEMICONDUCTOR MFG·Filed 2003·Granted Oct 19, 2004·45 cites·32 claims
- 2490US11784091B2Structure and formation method of chip package with fan-out featureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Oct 10, 2023·2 cites·20 claims
- 2590US7956465B2Reducing resistivity in interconnect structures of integrated circuitsTAIWAN SEMICONDUCTOR MFG·Filed 2010·Granted Jun 7, 2011·10 cites·15 claims
- 2690US7704886B2Multi-step Cu seed layer formation for improving sidewall coverageTAIWAN SEMICONDUCTOR MFG·Filed 2008·Granted Apr 27, 2010·16 cites·19 claims
- 2789US10658195B2Metal oxide layered structure and methods of forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted May 19, 2020·3 cites·8 claims
- 2889US10446522B2Methods of forming multiple conductive features in semiconductor devices in a same formation processTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted Oct 15, 2019·7 cites·20 claims
- 2988US9595510B1Structure and formation method for chip packageTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted Mar 14, 2017·4 cites·20 claims
- 3088US6706629B1Barrier-free copper interconnectTAIWAN SEMICONDUCTOR MFG·Filed 2003·Granted Mar 16, 2004·54 cites·47 claims
- 3187US10535554B2Semiconductor die having edge with multiple gradients and method for forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Jan 14, 2020·3 cites·20 claims
- 3287US8922004B2Copper bump structures having sidewall protection layersLIN JING-CHENG·Filed 2010·Granted Dec 30, 2014·9 cites·20 claims
- 3385US10699981B2Non-vertical through-via in packageTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted Jun 30, 2020·3 cites·20 claims
- 3485US9511299B1Rotary dynamic simulation device and audiovisual apparatus using the sameBROGENT TECH INC·Filed 2016·Granted Dec 6, 2016·8 cites·11 claims
- 3585US6943111B2Barrier free copper interconnect by multi-layer copper seedTAIWAN SEMICONDUCTOR MFG·Filed 2003·Granted Sep 13, 2005·36 cites·32 claims
- 3684US12255173B2Chip package structureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Granted Mar 18, 2025·0 cites·20 claims
- 3784US12183709B2Chip package structure with ring-like structureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Granted Dec 31, 2024·0 cites·20 claims
- 3884US9748156B1Semiconductor package assembly, semiconductor package and forming method thereofTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted Aug 29, 2017·4 cites·20 claims
- 3984US7612451B2Reducing resistivity in interconnect structures by forming an inter-layerTAIWAN SEMICONDUCTOR MFG·Filed 2006·Granted Nov 3, 2009·14 cites·15 claims
- 4084US2024096642A1Metal oxide layered structure and methods of forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Application pending·0 cites
- 4184US2025323096A1Package structure with fan-out featureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2025·Application pending·0 cites
- 4283US10510605B2Semiconductor die singulation and structures formed therebyTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted Dec 17, 2019·2 cites·19 claims
- 4383US9691726B2Methods for forming fan-out package structureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2014·Granted Jun 27, 2017·6 cites·19 claims
- 4483US8975749B2Method of making a semiconductor device including barrier layers for copper interconnectTAIWAN SEMICONDUCTOR MFG·Filed 2014·Granted Mar 10, 2015·5 cites·20 claims
- 4583US8264086B2Via structure with improved reliabilitySHUE SHAU-LIN·Filed 2005·Granted Sep 11, 2012·10 cites·17 claims
- 4683US2024363398A1Semiconductor die having edge with multiple gradientsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 4782US12489045B2Package structure with through viasTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Granted Dec 2, 2025·0 cites·20 claims
- 4882US11088108B2Chip package structure including ring-like structure and method for forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Aug 10, 2021·2 cites·20 claims
- 4980US11854826B2Metal oxide layered structure and methods of forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Dec 26, 2023·0 cites·20 claims
- 5080US10720360B2Semiconductor die singulation and structures formed therebyTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted Jul 21, 2020·2 cites·20 claims
Showing the top 50 of 124 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →