Inventor · disambiguated record
Chien Ling Hwang
Also filed as: HWANG CHIEN L · HWANG CHIEN LING
139 granted patents·24 pending applications·1,502 citations·filing 2005–2025
99Inventor score
Files withTAIWAN SEMICONDUCTOR MFG CO LTD108TAIWAN SEMICONDUCTOR MFG17HWANG CHIEN LING16HSIAO YI-LI4YU CHEN-HUA4
Top patents by PatentIndex Score
163 records- 0199US9368460B2Fan-out interconnect structure and method for forming sameTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Jun 14, 2016·1k cites·20 claims
- 0298US11502013B2Integrated circuit package and methodTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Nov 15, 2022·4 cites·20 claims
- 0397US9093337B2Methods for controlling warpage in packagingTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Jul 28, 2015·27 cites·20 claims
- 0496US9018758B2Cu pillar bump with non-metal sidewall spacer and metal top capHWANG CHIEN LING·Filed 2010·Granted Apr 28, 2015·28 cites·20 claims
- 0596US8441124B2Cu pillar bump with non-metal sidewall protection structureWU YI-WEN·Filed 2010·Granted May 14, 2013·25 cites·20 claims
- 0696US8258055B2Method of forming semiconductor dieHWANG CHIEN LING·Filed 2010·Granted Sep 4, 2012·38 cites·16 claims
- 0796US8104666B1Thermal compressive bonding with separate die-attach and reflow processesHWANG CHIEN LING·Filed 2010·Granted Jan 31, 2012·29 cites·18 claims
- 0895US10157881B2Methods for controlling warpage in packagingTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted Dec 18, 2018·9 cites·20 claims
- 0995US9984960B2Integrated fan-out package and method of fabricating the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted May 29, 2018·14 cites·20 claims
- 1095US8823166B2Pillar bumps and process for making sameLIN CHENG-CHUNG·Filed 2010·Granted Sep 2, 2014·25 cites·10 claims
- 1195US8317077B2Thermal compressive bonding with separate die-attach and reflow processesHWANG CHIEN LING·Filed 2012·Granted Nov 27, 2012·22 cites·15 claims
- 1293US10366966B1Method of manufacturing integrated fan-out packageTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted Jul 30, 2019·8 cites·20 claims
- 1392US11756872B2Package structure and manufacturing method thereofTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Sep 12, 2023·2 cites·20 claims
- 1492US11217555B2Aligning bumps in fan-out packaging processTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted Jan 4, 2022·7 cites·20 claims
- 1592US9870997B2Integrated fan-out package and method of fabricating the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted Jan 16, 2018·6 cites·20 claims
- 1692US9502383B23D integrated circuit package processing with panel type lidTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2014·Granted Nov 22, 2016·10 cites·17 claims
- 1791US11764127B2Semiconductor package and manufacturing method thereofTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Sep 19, 2023·2 cites·20 claims
- 1891US9601355B2Via structure for packaging and a method of formingTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted Mar 21, 2017·4 cites·20 claims
- 1991US9484226B2Methods for controlling warpage in packagingTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted Nov 1, 2016·5 cites·20 claims
- 2091US9048135B2Copper pillar bump with cobalt-containing sidewall protectionHWANG CHIEN LING·Filed 2011·Granted Jun 2, 2015·12 cites·21 claims
- 2190US11444002B2Package structureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Sep 13, 2022·2 cites·20 claims
- 2290US10510712B2Methods for controlling warpage in packagingTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted Dec 17, 2019·3 cites·20 claims
- 2390US10056285B2Semiconductor wafer device and manufacturing method thereofTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Aug 21, 2018·4 cites·20 claims
- 2490US9735039B2Apparatus for separating wafer from carrierTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2014·Granted Aug 15, 2017·10 cites·20 claims
- 2589US9685372B2Method of forming Cu pillar bump with non-metal sidewall spacer and metal top capTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted Jun 20, 2017·6 cites·20 claims
- 2689US8946742B2Semiconductor package with through silicon viasYU CHEN-HUA·Filed 2010·Granted Feb 3, 2015·7 cites·20 claims
- 2788US10269582B2Package structure, fan-out package structure and method of the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted Apr 23, 2019·4 cites·20 claims
- 2888US8841766B2Cu pillar bump with non-metal sidewall protection structureHWANG CHIEN LING·Filed 2010·Granted Sep 23, 2014·8 cites·20 claims
- 2988US8827695B2Wafer's ambiance controlHSIAO YI-LI·Filed 2009·Granted Sep 9, 2014·14 cites·20 claims
- 3087US10020236B2Dam for three-dimensional integrated circuitTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2014·Granted Jul 10, 2018·6 cites·20 claims
- 3187US9768142B2Mechanisms for forming bonding structuresTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2013·Granted Sep 19, 2017·7 cites·20 claims
- 3287US2025357422A1Method and apparatus for bonding semiconductor substrateTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2025·Application pending·0 cites
- 3386US8951037B2Wafer-level underfill and over-moldingJANG BOR-PING·Filed 2012·Granted Feb 10, 2015·5 cites·20 claims
- 3486US8569887B2Post passivation interconnect with oxidation prevention layerHWANG CHIEN LING·Filed 2010·Granted Oct 29, 2013·8 cites·20 claims
- 3585US9425179B2Chip packages and methods of manufacture thereofTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2014·Granted Aug 23, 2016·5 cites·20 claims
- 3685US8652260B2Apparatus for holding semiconductor wafersYU CHEN-HUA·Filed 2008·Granted Feb 18, 2014·8 cites·13 claims
- 3785US8177862B2Thermal compressive bond headHWANG CHIEN LING·Filed 2010·Granted May 15, 2012·7 cites·15 claims
- 3884US12374595B2Package system and manufacturing method thereofTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Granted Jul 29, 2025·0 cites·20 claims
- 3984US9966357B2Pick-and-place tool for packaging processTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted May 8, 2018·4 cites·20 claims
- 4084US8569897B2Protection layer for preventing UBM layer from chemical attack and oxidationLIU CHUNG-SHI·Filed 2010·Granted Oct 29, 2013·7 cites·20 claims
- 4183US10163837B2Cu pillar bump with L-shaped non-metal sidewall protection structureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted Dec 25, 2018·3 cites·20 claims
- 4283US8546802B2Pick-and-place tool for packaging processHWANG CHIEN LING·Filed 2011·Granted Oct 1, 2013·6 cites·20 claims
- 4383US8373269B1Jigs with controlled spacing for bonding dies onto package substratesTAIWAN SEMICONDUCTOR MFG·Filed 2011·Granted Feb 12, 2013·6 cites·20 claims
- 4482US11004758B2Integrated circuit package and methodTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted May 11, 2021·2 cites·20 claims
- 4582US9659891B2Semiconductor device having a boundary structure, a package on package structure, and a method of makingTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2013·Granted May 23, 2017·4 cites·20 claims
- 4682US9449931B2Pillar bumps and process for making sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2014·Granted Sep 20, 2016·4 cites·20 claims
- 4782US8540136B1Methods for stud bump formation and apparatus for performing the sameLIN YEONG-JYH·Filed 2012·Granted Sep 24, 2013·6 cites·19 claims
- 4882US2025309027A1Package system and manufacturing method thereofTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2025·Application pending·0 cites
- 4982US2025323182A1Semiconductor packages and methods of forming thereofTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2025·Application pending·0 cites
- 5082US2025309189A1Bonding with pre-deoxide process and apparatus for performing the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2025·Application pending·0 cites
Showing the top 50 of 163 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →