Inventor · disambiguated record
Daniel Prager
Also filed as: PRAGER DANIEL · PRAGER DANIEL J · PRAGER DANIEL JOSEPH
21 granted patents·1 pending application·315 citations·filing 2003–2011
95Inventor score
Top patents by PatentIndex Score
22 records- 0194US7328418B2Iso/nested control for soft mask processingTOKYO ELECTRON LTD·Filed 2005·Granted Feb 5, 2008·29 cites·19 claims
- 0293US7967995B2Multi-layer/multi-input/multi-output (MLMIMO) models and method for usingTOKYO ELECTRON LTD·Filed 2008·Granted Jun 28, 2011·25 cites·19 claims
- 0393US7894927B2Using Multi-Layer/Multi-Input/Multi-Output (MLMIMO) models for metal-gate structuresTOKYO ELECTRON LTD·Filed 2008·Granted Feb 22, 2011·23 cites·32 claims
- 0492US7126700B2Parametric optimization of optical metrology modelTIMBRE TECH INC·Filed 2003·Granted Oct 24, 2006·59 cites·56 claims
- 0591US7502709B2Dynamic metrology sampling for a dual damascene processTOKYO ELECTRON LTD·Filed 2006·Granted Mar 10, 2009·17 cites·33 claims
- 0689US7713758B2Method and apparatus for optimizing a gate channelTOKYO ELECTON LTD·Filed 2007·Granted May 11, 2010·22 cites·20 claims
- 0789US7567700B2Dynamic metrology sampling with wafer uniformity controlTOKYO ELECTRON LTD·Filed 2006·Granted Jul 28, 2009·11 cites·24 claims
- 0888US7939450B2Method and apparatus for spacer-optimization (S-O)TOKYO ELECTRON LTD·Filed 2007·Granted May 10, 2011·13 cites·20 claims
- 0988US7487053B2Refining a virtual profile libraryTOKYO ELECTRON LTD·Filed 2006·Granted Feb 3, 2009·13 cites·34 claims
- 1085US7899637B2Method and apparatus for creating a gate optimization evaluation libraryTOKYO ELECTRON LTD·Filed 2007·Granted Mar 1, 2011·11 cites·15 claims
- 1185US7765077B2Method and apparatus for creating a Spacer-Optimization (S-O) libraryTOKYO ELECTRON LTD·Filed 2007·Granted Jul 27, 2010·13 cites·16 claims
- 1282US7395132B2Optical metrology model optimization for process controlTIMBRE TECH INC·Filed 2007·Granted Jul 1, 2008·11 cites·28 claims
- 1381US7305322B2Using a virtual profile libraryTOKYO ELECTRON LTD·Filed 2006·Granted Dec 4, 2007·11 cites·38 claims
- 1480US7209798B2Iso/nested cascading trim control with model feedback updatesTOKYO ELECTRON LTD·Filed 2004·Granted Apr 24, 2007·24 cites·36 claims
- 1577US7542859B2Creating a virtual profile libraryTOKYO ELECTRON LTD·Filed 2006·Granted Jun 2, 2009·5 cites·34 claims
- 1675US8019458B2Creating multi-layer/multi-input/multi-output (MLMIMO) models for metal-gate structuresTOKYO ELECTRON LTD·Filed 2008·Granted Sep 13, 2011·14 cites·26 claims
- 1768US8183062B2Creating metal gate structures using Lithography-Etch-Lithography-Etch (LELE) processing sequencesFUNK MERRITT·Filed 2009·Granted May 22, 2012·3 cites·19 claims
- 1866US8501628B2Differential metal gate etching processLUONG VINH HOANG·Filed 2010·Granted Aug 6, 2013·2 cites·20 claims
- 1965US7289864B2Feature dimension deviation correction system, method and program productTOKYO ELECTRON LTD·Filed 2004·Granted Oct 30, 2007·8 cites·30 claims
- 2053US8532796B2Contact processing using multi-input/multi-output (MIMO) modelsPRAGER DANIEL J·Filed 2011·Granted Sep 10, 2013·1 cites·19 claims
- 2153US7502660B2Feature dimension deviation correction system, method and program productIBM·Filed 2007·Granted Mar 10, 2009·0 cites·27 claims
- 2242US2007238201A1Dynamic metrology sampling with wafer uniformity controlFUNK MERRITT·Filed 2006·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →