Inventor · disambiguated record
Dinesh Somasekhar
Also filed as: SOMASEKHAR DINESH
120 granted patents·21 pending applications·2,550 citations·filing 1997–2023
99Inventor score
Top patents by PatentIndex Score
141 records- 0199US7199617B1Level shifterINTEL CORP·Filed 2005·Granted Apr 3, 2007·98 cites·23 claims
- 0298US7230846B2Purge-based floating body memoryINTEL CORP·Filed 2005·Granted Jun 12, 2007·118 cites·21 claims
- 0398US6903984B1Floating-body DRAM using write word line for increased retention timeINTEL CORP·Filed 2003·Granted Jun 7, 2005·138 cites·30 claims
- 0498US6721222B2Noise suppression for open bit line DRAM architecturesINTEL CORP·Filed 2002·Granted Apr 13, 2004·169 cites·7 claims
- 0597US7061806B2Floating-body memory cell writeINTEL CORP·Filed 2004·Granted Jun 13, 2006·151 cites·12 claims
- 0697US6421269B1Low-leakage MOS planar capacitors for use within DRAM storage cellsINTEL CORP·Filed 2000·Granted Jul 16, 2002·147 cites·38 claims
- 0796US7167397B2Apparatus and method for programming a memory arrayINTEL CORP·Filed 2005·Granted Jan 23, 2007·50 cites·15 claims
- 0896US6724648B2SRAM array with dynamic voltage for reducing active leakage powerINTEL CORP·Filed 2002·Granted Apr 20, 2004·128 cites·35 claims
- 0995US9105510B2Double sidewall image transfer processGLOBALFOUNDRIES INC·Filed 2014·Granted Aug 11, 2015·16 cites·17 claims
- 1095US8889561B2Double sidewall image transfer processWOO YOUNGTAG·Filed 2012·Granted Nov 18, 2014·44 cites·12 claims
- 1195US8539303B2Low overhead error correcting code protection for stored informationLU SHIH-LIEN L·Filed 2010·Granted Sep 17, 2013·46 cites·16 claims
- 1294US8640005B2Method and apparatus for using cache memory in a system that supports a low power stateWILKERSON CHRISTOPHER B·Filed 2010·Granted Jan 28, 2014·39 cites·22 claims
- 1394US7558097B2Memory having bit line with resistor(s) between memory cellsINTEL CORP·Filed 2006·Granted Jul 7, 2009·33 cites·17 claims
- 1494US7403426B2Memory with dynamically adjustable supplyINTEL CORP·Filed 2005·Granted Jul 22, 2008·36 cites·12 claims
- 1594US7307899B2Reducing power consumption in integrated circuitsINTEL CORP·Filed 2005·Granted Dec 11, 2007·36 cites·5 claims
- 1694US7102951B2OTP antifuse cell and cell arrayINTEL CORP·Filed 2004·Granted Sep 5, 2006·86 cites·27 claims
- 1794US6784722B2Wide-range local bias generator for body bias gridINTEL CORP·Filed 2002·Granted Aug 31, 2004·58 cites·13 claims
- 1893US9837391B2Scalable polylithic on-package integratable apparatus and methodINTEL CORP·Filed 2015·Granted Dec 5, 2017·8 cites·17 claims
- 1993US7859081B2Capacitor, method of increasing a capacitance area of same, and system containing sameINTEL CORP·Filed 2007·Granted Dec 28, 2010·25 cites·8 claims
- 2093US7729445B2Digital outphasing transmitter architectureINTEL CORP·Filed 2006·Granted Jun 1, 2010·31 cites·14 claims
- 2193US7280425B2Dual gate oxide one time programmable (OTP) antifuse cellINTEL CORP·Filed 2005·Granted Oct 9, 2007·32 cites·19 claims
- 2292US8519462B26F2 DRAM cellWANG YIH·Filed 2011·Granted Aug 27, 2013·20 cites·11 claims
- 2392US8138042B2Capacitor, method of increasing a capacitance area of same, and system containing sameDOYLE BRIAN S·Filed 2010·Granted Mar 20, 2012·12 cites·12 claims
- 2491US7342845B2Method and apparatus to clamp SRAM supply voltageINTEL CORP·Filed 2005·Granted Mar 11, 2008·21 cites·21 claims
- 2590US9992135B2Apparatus and method for fusion of compute and switching functions of exascale system into a single component by using configurable network-on-chip fabric with distributed dual mode input-output ports and programmable network interfacesINTEL CORP·Filed 2015·Granted Jun 5, 2018·9 cites·23 claims
- 2690US9589615B2Digitally trimmable integrated resistors including resistive memory elementsINTEL CORP·Filed 2015·Granted Mar 7, 2017·10 cites·23 claims
- 2790US7020041B2Method and apparatus to clamp SRAM supply voltageINTEL CORP·Filed 2003·Granted Mar 28, 2006·43 cites·42 claims
- 2890US6459316B1Flip flop circuitINTEL CORP·Filed 2000·Granted Oct 1, 2002·35 cites·26 claims
- 2989US7391640B22-transistor floating-body dramINTEL CORP·Filed 2004·Granted Jun 24, 2008·45 cites·43 claims
- 3089US7031203B2Floating-body DRAM using write word line for increased retention timeINTEL CORP·Filed 2005·Granted Apr 18, 2006·14 cites·22 claims
- 3189US6014041ADifferential current switch logic gateINTEL CORP·Filed 1997·Granted Jan 11, 2000·67 cites·17 claims
- 3288US9287208B1Architecture for on-die interconnectINTEL CORP·Filed 2014·Granted Mar 15, 2016·8 cites·20 claims
- 3388US6707708B1Static random access memory with symmetric leakage-compensated bit lineINTEL CORP·Filed 2002·Granted Mar 16, 2004·46 cites·8 claims
- 3487US6757784B2Hiding refresh of memory and refresh-hidden memoryINTEL CORP·Filed 2001·Granted Jun 29, 2004·44 cites·15 claims
- 3586US9230636B2Apparatus for dual purpose charge pumpMEINERZHAGEN PASCAL A·Filed 2013·Granted Jan 5, 2016·13 cites·19 claims
- 3686US7246215B2Systolic memory arraysINTEL CORP·Filed 2003·Granted Jul 17, 2007·38 cites·27 claims
- 3786US7098507B2Floating-body dynamic random access memory and method of fabrication in tri-gate technologyINTEL CORP·Filed 2004·Granted Aug 29, 2006·32 cites·30 claims
- 3885US6597223B2Flip flop circuitINTEL CORP·Filed 2002·Granted Jul 22, 2003·24 cites·16 claims
- 3984US7653846B2Memory cell bit valve loss detection and restorationINTEL CORP·Filed 2006·Granted Jan 26, 2010·18 cites·20 claims
- 4084US6801463B2Method and apparatus for leakage compensation with full Vcc pre-chargeINTEL CORP·Filed 2002·Granted Oct 5, 2004·33 cites·17 claims
- 4183US10319461B2Low-overhead mechanism to detect address faults in ECC-protected memoriesINTEL CORP·Filed 2016·Granted Jun 11, 2019·5 cites·19 claims
- 4283US9870012B2Digitally phase locked low dropout regulator apparatus and system using ring oscillatorsINTEL CORP·Filed 2012·Granted Jan 16, 2018·6 cites·27 claims
- 4382US7236410B2Memory cell driver circuitsINTEL CORP·Filed 2005·Granted Jun 26, 2007·14 cites·17 claims
- 4482US7123500B21P1N 2T gain cellINTEL CORP·Filed 2003·Granted Oct 17, 2006·30 cites·10 claims
- 4582US7080111B2Floating point multiply accumulatorINTEL CORP·Filed 2001·Granted Jul 18, 2006·34 cites·26 claims
- 4680US9998401B2Architecture for on-die interconnectINTEL CORP·Filed 2016·Granted Jun 12, 2018·3 cites·20 claims
- 4779US8769376B2Memory cell supply voltage control based on error detectionKHELLAH MUHAMMAD·Filed 2012·Granted Jul 1, 2014·5 cites·20 claims
- 4878US8488390B2Circuits and methods for memoryKULKARNI JAYDEEP P·Filed 2011·Granted Jul 16, 2013·6 cites·20 claims
- 4978US8406073B1Hierarchical DRAM sensingSOMASEKHAR DINESH·Filed 2010·Granted Mar 26, 2013·8 cites·19 claims
- 5076US7514746B2Floating-body dynamic random access memory and method of fabrication in tri-gate technologyINTEL CORP·Filed 2006·Granted Apr 7, 2009·5 cites·10 claims
Showing the top 50 of 141 patent records by PatentIndex Score.
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