Inventor · disambiguated record
Earl A. Killian
Also filed as: KILLIAN EARL A
34 granted patents·1 pending application·2,877 citations·filing 1988–2010
98Inventor score
Technology areasG06F
Top patents by PatentIndex Score
35 records- 0198US6477683B1Automated processor generation system for designing a configurable processor and method for the sameTENSILICA INC·Filed 1999·Granted Nov 5, 2002·437 cites·104 claims
- 0297US8006204B2Automated processor generation system for designing a configurable processor and method for the sameTENSILICA INC·Filed 2006·Granted Aug 23, 2011·70 cites·19 claims
- 0397US7020854B2Automated processor generation system for designing a configurable processor and method for the sameTENSILICA INC·Filed 2004·Granted Mar 28, 2006·152 cites·10 claims
- 0497US5933650AAlignment and ordering of vector elements for single instruction multiple data processingMIPS TECH INC·Filed 1997·Granted Aug 3, 1999·352 cites·44 claims
- 0596US7219212B1Load/store operation of memory misaligned vector data using alignment register storing realigned data portion for combining with remaining portionTENSILICA INC·Filed 2005·Granted May 15, 2007·121 cites·8 claims
- 0696US6760888B2Automated processor generation system for designing a configurable processor and method for the sameTENSILICA INC·Filed 2002·Granted Jul 6, 2004·148 cites·8 claims
- 0795US5864703AMethod for providing extended precision in SIMD vector arithmetic operationsMIPS TECH INC·Filed 1997·Granted Jan 26, 1999·204 cites·40 claims
- 0894US7036106B1Automated processor generation system for designing a configurable processor and method for the sameTENSILICA INC·Filed 2000·Granted Apr 25, 2006·109 cites·38 claims
- 0993US8074058B2Providing extended precision in SIMD vector arithmetic operationsVAN HOOK TIMOTHY J·Filed 2009·Granted Dec 6, 2011·24 cites·20 claims
- 1092US7197625B1Alignment and ordering of vector elements for single instruction multiple data processingMIPS TECH INC·Filed 2000·Granted Mar 27, 2007·61 cites·18 claims
- 1192US6854046B1Configurable memory management unitTENSILICA INC·Filed 2002·Granted Feb 8, 2005·100 cites·34 claims
- 1292US6266758B1Alignment and ordering of vector elements for single instruction multiple data processingMIPS TECH INC·Filed 1999·Granted Jul 24, 2001·193 cites·13 claims
- 1391US7376812B1Vector co-processor for configurable and extensible processor architectureTENSILICA INC·Filed 2002·Granted May 20, 2008·78 cites·22 claims
- 1488US8924898B2System and method of designing instruction extensions to supplement an existing processor instruction set architectureKILLIAN EARL A·Filed 2008·Granted Dec 30, 2014·16 cites·21 claims
- 1586US7793077B2Alignment and ordering of vector elements for single instruction multiple data processingMIPS TECH INC·Filed 2007·Granted Sep 7, 2010·12 cites·14 claims
- 1685US8161432B2Automated processor generation system and method for designing a configurable processorWANG ALBERT REN-RUI·Filed 2008·Granted Apr 17, 2012·14 cites·16 claims
- 1782US7546443B2Providing extended precision in SIMD vector arithmetic operationsMIPS TECH INC·Filed 2006·Granted Jun 9, 2009·8 cites·20 claims
- 1882US6282633B1High data density RISC processorTENSILICA INC·Filed 1998·Granted Aug 28, 2001·104 cites·21 claims
- 1981US5398328ASystem for obtaining correct byte addresses by XOR-ING 2 LSB bits of byte address with binary 3 to facilitate compatibility between computer architecture having different memory ordersSILICON GRAPHICS INC·Filed 1993·Granted Mar 14, 1995·82 cites·9 claims
- 2081US5027270AProcessor controlled interface with instruction streamingMIPS COMPUTER SYSTEMS INC·Filed 1988·Granted Jun 25, 1991·72 cites·3 claims
- 2180US6425076B1Instruction prediction based on filteringMIPS TECH INC·Filed 2000·Granted Jul 23, 2002·25 cites·27 claims
- 2279US6477697B1Adding complex instruction extensions defined in a standardized language to a microprocessor design to produce a configurable definition of a target instruction set, and hdl description of circuitry necessary to implement the instruction set, and development and verification tools for the instruction setTENSILICA INC·Filed 1999·Granted Nov 5, 2002·88 cites·20 claims
- 2378US7437700B2Automated processor generation system and method for designing a configurable processorTENSILICA INC·Filed 2005·Granted Oct 14, 2008·7 cites·24 claims
- 2475US5420992ABackward-compatible computer architecture with extended word size and address spaceSILICON GRAPHICS INC·Filed 1994·Granted May 30, 1995·65 cites·17 claims
- 2573US8875068B2System and method of customizing an existing processor design having an existing processor instruction set architecture with instruction extensionsKILLIAN EARL A·Filed 2008·Granted Oct 28, 2014·4 cites·20 claims
- 2673US5574877ATLB with two physical pages per virtual tagSILICON GRAPHICS INC·Filed 1992·Granted Nov 12, 1996·60 cites·8 claims
- 2773US5568630ABackward-compatible computer architecture with extended word size and address spaceSILICON GRAPHICS INC·Filed 1995·Granted Oct 22, 1996·65 cites·14 claims
- 2871US6092187AInstruction prediction based on filteringMIPS TECH INC·Filed 1997·Granted Jul 18, 2000·51 cites·13 claims
- 2968US7346881B2Method and apparatus for adding advanced instructions in an extensible processor architectureTENSILICA INC·Filed 2002·Granted Mar 18, 2008·14 cites·17 claims
- 3063US5696958AMethod and apparatus for reducing delays following the execution of a branch instruction in an instruction pipelineSILICON GRAPHICS INC·Filed 1995·Granted Dec 9, 1997·47 cites·20 claims
- 3161US5572713ASystem and method for obtaining correct byte addresses by using logical operations on 2 least significant bits of byte address to facilitate compatibility between computer architectures having different memory ordersSILICON GRAPHICS INC·Filed 1995·Granted Nov 5, 1996·36 cites·11 claims
- 3260US5479630AHybrid cache having physical-cache and virtual-cache characteristics and method for accessing sameSILICON GRAPHICS INC·Filed 1994·Granted Dec 26, 1995·35 cites·13 claims
- 3357US7159100B2Method for providing extended precision in SIMD vector arithmetic operationsMIPS TECH INC·Filed 1998·Granted Jan 2, 2007·23 cites·8 claims
- 3451US9582278B2Automated processor generation system and method for designing a configurable processorWANG ALBERT REN-RUI·Filed 2008·Granted Feb 28, 2017·0 cites·20 claims
- 3550US2011055497A1Alignment and Ordering of Vector Elements for Single Instruction Multiple Data ProcessingMIPS TECH INC·Filed 2010·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →