Inventor · disambiguated record
Ernest L. Edgar
Also filed as: EDGAR ERNEST L · EDGAR ERNEST LEWIS
11 granted patents·7 pending applications·213 citations·filing 2001–2024
90Inventor score
Top patents by PatentIndex Score
18 records- 0193US7886150B2System debug and trace system and method, and applications thereofMIPS TECH INC·Filed 2007·Granted Feb 8, 2011·39 cites·19 claims
- 0289US7043668B1Optimized external trace formatsMIPS TECH INC·Filed 2001·Granted May 9, 2006·75 cites·26 claims
- 0387US11321511B2Reset crossing and clock crossing interface for integrated circuit generationSIFIVE INC·Filed 2021·Granted May 3, 2022·2 cites·20 claims
- 0487US7134116B1External trace synchronization via periodic samplingMIPS TECH INC·Filed 2001·Granted Nov 7, 2006·50 cites·14 claims
- 0585US11675945B2Reset crossing and clock crossing interface for integrated circuit generationSIFIVE INC·Filed 2022·Granted Jun 13, 2023·1 cites·20 claims
- 0681US7475303B1HyperJTAG system including debug probe, on-chip instrumentation, and protocolMIPS TECH INC·Filed 2004·Granted Jan 6, 2009·33 cites·20 claims
- 0773US8185879B2External trace synchronization via periodic samplingTHEKKATH RADHIKA·Filed 2006·Granted May 22, 2012·7 cites·14 claims
- 0868US7702055B2Apparatus and method for tracing processor state from multiple clock domainsMIPS TECH INC·Filed 2006·Granted Apr 20, 2010·4 cites·19 claims
- 0964US12235749B2Trace encoder with event filterSIFIVE INC·Filed 2023·Granted Feb 25, 2025·0 cites·18 claims
- 1059US12399721B2Debug in system on a chip with securely partitioned memory spaceSIFIVE INC·Filed 2022·Granted Aug 26, 2025·0 cites·20 claims
- 1157US2024338277A1Cycle accurate tracing of vector instructionsSIFIVE INC·Filed 2024·Application pending·0 cites
- 1256US7613966B2Hyperjtag system including debug probe, on-chip instrumentation, and protocolMIPS TECH INC·Filed 2009·Granted Nov 3, 2009·2 cites·5 claims
- 1356US2024320127A1Event tracingSIFIVE INC·Filed 2024·Application pending·0 cites
- 1448US2024320078A1Processor Crash Analysis Using Register SamplingSIFIVE INC·Filed 2022·Application pending·0 cites
- 1547US2022308878A1Branch-History Mode Trace EncoderSIFIVE INC·Filed 2022·Application pending·0 cites
- 1644US2008082801A1Apparatus and method for tracing instructions with simplified instruction state descriptorsMIPS TECH INC·Filed 2006·Application pending·0 cites
- 1743US2009037886A1Apparatus and method for evaluating a free-running trace streamMIPS TECH INC·Filed 2007·Application pending·0 cites
- 1842US2008155345A1Apparatus and method for forming a bus transaction trace stream with simplified bus transaction descriptorsMIPS TECH INC·Filed 2006·Application pending·0 cites
Join the waitlist — get patent alerts
Get an alert when Ernest L. Edgar files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →