Inventor · disambiguated record
Erik Volkerink
Also filed as: VOLKERINK ERIK · VOLKERINK ERIK H
16 granted patents·3 pending applications·205 citations·filing 2002–2022
93Inventor score
Files withVERIGY PTE LTD SINGAPORE7ADVANTEST CORP2KHOCHE AJAY2ADVANTEST SINGAPORE PTE LTD1ANDBERG JOHN W1
Top patents by PatentIndex Score
19 records- 0194US10819137B2Energy harvesting wireless sensing systemKHOCHE AJAY·Filed 2019·Granted Oct 27, 2020·11 cites·13 claims
- 0293US7590903B2Re-configurable architecture for automated test equipmentVERIGY PTE LTD SINGAPORE·Filed 2006·Granted Sep 15, 2009·28 cites·17 claims
- 0389US7743304B2Test system and method for testing electronic devices using a pipelined testing architectureVERIGY PTE LTD SINGAPORE·Filed 2006·Granted Jun 22, 2010·17 cites·20 claims
- 0489US7131046B2System and method for testing circuitry using an externally generated signatureVERIGY IPCO·Filed 2002·Granted Oct 31, 2006·42 cites·27 claims
- 0587US7279919B2Systems and methods of allocating device testing resources to sites of a probe cardVERIGY PTE LTD SINGAPORE·Filed 2005·Granted Oct 9, 2007·16 cites·28 claims
- 0686US7707468B2System and method for electronic testing of multiple memory devicesVERIGY PTE LTD SINGAPORE·Filed 2007·Granted Apr 27, 2010·20 cites·20 claims
- 0781US8347156B2Test system and method for testing electronic devices using a pipelined testing architectureADVANTEST SINGAPORE PTE LTD·Filed 2010·Granted Jan 1, 2013·4 cites·20 claims
- 0878US7412639B2System and method for testing circuitry on a waferVERIGY PTE LTD SINGAPORE·Filed 2002·Granted Aug 12, 2008·30 cites·26 claims
- 0975US7378860B2Wafer test head architecture and method of useVERIGY PTE LTD SINGAPORE·Filed 2006·Granted May 27, 2008·8 cites·14 claims
- 1070US9429623B2Solution for full speed, parallel DUT testingFILLER W SCOTT VILLAREAL·Filed 2011·Granted Aug 30, 2016·7 cites·19 claims
- 1168US8320235B2Self-repair system and method for providing resource failure toleranceVOLKERINK ERIK H·Filed 2006·Granted Nov 27, 2012·7 cites·32 claims
- 1266US9335347B2Method and apparatus for massively parallel multi-wafer testANDBERG JOHN W·Filed 2012·Granted May 10, 2016·3 cites·13 claims
- 1365US7386777B2Systems and methods for processing automatically generated test patternsVERIGY PTE LTD SINGAPORE·Filed 2004·Granted Jun 10, 2008·11 cites·25 claims
- 1464US8797056B2System and method for electronic testing of partially processed devicesKHOCHE AJAY·Filed 2011·Granted Aug 5, 2014·1 cites·21 claims
- 1548US10025648B2System, methods and apparatus using virtual appliances in a semiconductor test environmentADVANTEST CORP·Filed 2015·Granted Jul 17, 2018·0 cites·20 claims
- 1643US2008252330A1Method and apparatus for singulated die testingVERIGY CORP·Filed 2007·Application pending·0 cites
- 1742US2014236527A1Cloud based infrastructure for supporting protocol reconfigurations in protocol independent device testing systemsADVANTEST CORP·Filed 2013·Application pending·0 cites
- 1834US11700063B2Appliance remote controlVOLLEY BASE INC·Filed 2022·Granted Jul 11, 2023·0 cites·7 claims
- 1933US2009144007A1System and method for electronic testing of devicesMOREIRA JOSE·Filed 2007·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →