Inventor · disambiguated record
Fan-Chi Hou
Also filed as: ANDERSON LARRY B · HOU FAN-CHI · HOU FAN-CHI FRANK
5 granted patents·2 pending applications·58 citations·filing 2003–2010
80Inventor score
Top patents by PatentIndex Score
7 records- 0178US7018880B2Method for manufacturing a MOS transistor having reduced 1/f noiseTEXAS INSTRUMENTS INC·Filed 2003·Granted Mar 28, 2006·26 cites·19 claims
- 0277US6861303B2JFET structure for integrated circuit and fabrication methodTEXAS INSTRUMENTS INC·Filed 2003·Granted Mar 1, 2005·21 cites·25 claims
- 0373US7268394B2JFET structure for integrated circuit and fabrication methodTEXAS INSTRUMENTS INC·Filed 2005·Granted Sep 11, 2007·5 cites·16 claims
- 0462US7745274B2Gate self aligned low noise JFETTEXAS INSTRUMENTS INC·Filed 2007·Granted Jun 29, 2010·2 cites·22 claims
- 0560US8436635B2Semiconductor wafer having test modules including pin matrix selectable test devicesMOLLAT MARTIN B·Filed 2009·Granted May 7, 2013·4 cites·10 claims
- 0642US2010264466A1Gate self-aligned low noise jfetTEXAS INSTRUMENTS INC·Filed 2010·Application pending·0 cites
- 0737US2007218663A1Semiconductor device incorporating fluorine into gate dielectricTEXAS INSTRUMENTS INC·Filed 2006·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →