Inventor · disambiguated record
Ferran Martorell
Also filed as: MARTORELL FERRAN
9 granted patents·1 pending application·13 citations·filing 2010–2022
83Inventor score
Top patents by PatentIndex Score
10 records- 0185US9454636B1Integrated circuit design optimizationESILICON CORP·Filed 2015·Granted Sep 27, 2016·4 cites·20 claims
- 0279US11233002B2High density low power interconnect using 3D die stackingMARVELL ASIA PTE LTD·Filed 2020·Granted Jan 25, 2022·1 cites·11 claims
- 0376US8433875B2Asynchronous scheme for clock domain crossingCORTADELLA JORDI·Filed 2010·Granted Apr 30, 2013·7 cites·14 claims
- 0470US9454628B1Scaling memory components of integrated circuit designESILICON CORP·Filed 2015·Granted Sep 27, 2016·1 cites·20 claims
- 0569US11942409B2High density low power interconnect using 3D die stackingMARVELL ASIA PTE LTD·Filed 2022·Granted Mar 26, 2024·0 cites·18 claims
- 0656US2016371411A1Scaling of Integrated Circuit Design Including High-Level Logic ComponentsESILICON CORP·Filed 2016·Application pending·0 cites
- 0755US9460254B1Scaling logic components of integrated circuit designESILICON CORP·Filed 2015·Granted Oct 4, 2016·0 cites·20 claims
- 0855US9460257B1Scaling of integrated circuit design including high-level logic componentsESILICON CORP·Filed 2015·Granted Oct 4, 2016·0 cites·20 claims
- 0954US9460255B1Scaling of integrated circuit design including logic and memory componentsESILICON CORP·Filed 2015·Granted Oct 4, 2016·0 cites·20 claims
- 1054US9460256B1Integrated circuit design scaling for recommending design pointESILICON CORP·Filed 2015·Granted Oct 4, 2016·0 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →