Inventor · disambiguated record
Francis Benistant
Also filed as: BENISTANT FRANCIS · BENISTANT FRANCIS L · BENISTANT FRANCIS LIONEL
30 granted patents·4 pending applications·271 citations·filing 1998–2023
96Inventor score
Files withGLOBALFOUNDRIES INC8CHARTERED SEMICONDUCTOR MFG6GLOBALFOUNDRIES SG PTE LTD6MICRON TECHNOLOGY INC6BAZIZI EL MEHDI1
Top patents by PatentIndex Score
34 records- 0198US9871132B1Extended drain metal-oxide-semiconductor transistorGLOBALFOUNDRIES SG PTE LTD·Filed 2016·Granted Jan 16, 2018·61 cites·19 claims
- 0297US8053340B2Method for fabricating semiconductor devices with reduced junction diffusionUNIV SINGAPORE·Filed 2007·Granted Nov 8, 2011·97 cites·26 claims
- 0393US9673084B2Isolation scheme for high voltage deviceGLOBALFOUNDRIES SG PTE LTD·Filed 2015·Granted Jun 6, 2017·13 cites·22 claims
- 0491US9947788B2Device with diffusion blocking layer in source/drain regionGLOBALFOUNDRIES INC·Filed 2016·Granted Apr 17, 2018·8 cites·18 claims
- 0587US10164099B2Device with diffusion blocking layer in source/drain regionGLOBALFOUNDRIES INC·Filed 2018·Granted Dec 25, 2018·5 cites·11 claims
- 0683US9406752B2FinFET conformal junction and high EPI surface dopant concentration method and deviceGLOBALFOUNDRIES INC·Filed 2015·Granted Aug 2, 2016·3 cites·13 claims
- 0781US6492228B2Dual floating gate programmable read only memory cell structure and method for its fabrication and operationMICRON TECHNOLOGY INC·Filed 2001·Granted Dec 10, 2002·18 cites·22 claims
- 0879US8994107B2Semiconductor devices and methods of forming the semiconductor devices including a retrograde wellBAZIZI EL MEHDI·Filed 2012·Granted Mar 31, 2015·8 cites·11 claims
- 0978US8354321B2Method for fabricating semiconductor devices with reduced junction diffusionGLOBALFOUNDRIES SG PTE LTD·Filed 2011·Granted Jan 15, 2013·4 cites·20 claims
- 1077US9966433B2Multiple-step epitaxial growth S/D regions for NMOS FinFETGLOBALFOUNDRIES INC·Filed 2016·Granted May 8, 2018·2 cites·9 claims
- 1170US9997225B2System and method for modular simulation of spin transfer torque magnetic random access memory devicesGLOBALFOUNDRIES SG PTE LTD·Filed 2015·Granted Jun 12, 2018·2 cites·20 claims
- 1270US9577040B2FinFET conformal junction and high epi surface dopant concentration method and deviceGLOBALFOUNDRIES INC·Filed 2016·Granted Feb 21, 2017·1 cites·20 claims
- 1369US7253483B2Semiconductor device layout and channeling implant processCHARTERED SEMICONDUCTOR MFG·Filed 2005·Granted Aug 7, 2007·2 cites·23 claims
- 1469US6756268B2Modified source/drain re-oxidation method and systemMICRON TECHNOLOGY INC·Filed 2002·Granted Jun 29, 2004·8 cites·35 claims
- 1567US8860142B2Method and apparatus to reduce thermal variations within an integrated circuit die using thermal proximity correctionGLOBALFOUNDRIES SG PTE LTD·Filed 2012·Granted Oct 14, 2014·2 cites·20 claims
- 1666US6243289B1Dual floating gate programmable read only memory cell structure and method for its fabrication and operationMICRON TECHNOLOGY INC·Filed 1998·Granted Jun 5, 2001·15 cites·41 claims
- 1760US6649470B2Dual floating gate programmable read only memory cell structure and method for its fabrication and operationMICRON TECHNOLOGY INC·Filed 2002·Granted Nov 18, 2003·5 cites·15 claims
- 1855US7101743B2Low cost source drain elevation through poly amorphizing implant technologyCHARTERED SEMICONDUCTOR MFG L·Filed 2004·Granted Sep 5, 2006·8 cites·13 claims
- 1954US9559176B2FinFET conformal junction and abrupt junction with reduced damage method and deviceGLOBALFOUNDRIES INC·Filed 2016·Granted Jan 31, 2017·0 cites·20 claims
- 2052US6969646B2Method of activating polysilicon gate structure dopants after offset spacer depositionCHARTERED SEMICONDUCTOR MFG·Filed 2003·Granted Nov 29, 2005·5 cites·16 claims
- 2151US7573099B2Semiconductor device layout and channeling implant processCHARTERED SEMICONDUCTOR MFG·Filed 2005·Granted Aug 11, 2009·0 cites·21 claims
- 2251US6972236B2Semiconductor device layout and channeling implant processCHARTERED SEMICONDUCTOR MFG·Filed 2004·Granted Dec 6, 2005·2 cites·13 claims
- 2350US9397162B1FinFET conformal junction and abrupt junction with reduced damage method and deviceGLOBALFOUNDRIES INC·Filed 2015·Granted Jul 19, 2016·0 cites·15 claims
- 2449US2023352552A1Memory, Gate-All-Around Field-Effect Transistor, and Manufacturing MethodHUAWEI TECH CO LTD·Filed 2023·Application pending·0 cites
- 2546US2005272203A1Modified source/drain re-oxidation method and systemRUDECK PAUL J·Filed 2005·Application pending·0 cites
- 2645US7037860B2Modified source/drain re-oxidation method and systemMICRON TECHNOLOGY INC·Filed 2004·Granted May 2, 2006·0 cites·32 claims
- 2744US8293544B2Method and apparatus to reduce thermal variations within an integrated circuit die using thermal proximity correctionPOON DEBORA CHYIU HYIA·Filed 2008·Granted Oct 23, 2012·0 cites·16 claims
- 2844US7888752B2Structure and method to form source and drain regions over doped depletion regionsGLOBALFOUNDRIES SG PTE LTD·Filed 2007·Granted Feb 15, 2011·0 cites·18 claims
- 2943US7271435B2Modified source/drain re-oxidation method and systemMICRON TECHNOLOGY INC·Filed 2002·Granted Sep 18, 2007·0 cites·12 claims
- 3042US7259072B2Shallow low energy ion implantation into pad oxide for improving threshold voltage stabilityCHARTERED SEMICONDUCTOR MFG·Filed 2004·Granted Aug 21, 2007·1 cites·16 claims
- 3141US2002096707A1Modified source/drain re-oxidation method and systemFiled 2001·Application pending·0 cites
- 3237US9269770B2Integrated circuit system with double doped drain transistorLI YISUO·Filed 2007·Granted Feb 23, 2016·0 cites·20 claims
- 3337US7202133B2Structure and method to form source and drain regions over doped depletion regionsCHARTERED SEMICONDUCTOR MFG·Filed 2004·Granted Apr 10, 2007·1 cites·27 claims
- 3435US2017288041A1Method for forming a doped region in a fin using a variable thickness spacer and the resulting deviceGLOBALFOUNDRIES INC·Filed 2016·Application pending·0 cites
Join the waitlist — get patent alerts
Get an alert when Francis Benistant files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →