Inventor · disambiguated record
Freidoon Mehrad
Also filed as: MEHRAD FREIDOON
52 granted patents·11 pending applications·818 citations·filing 1995–2010
98Inventor score
Top patents by PatentIndex Score
63 records- 0197US6930007B2Integration of pre-S/D anneal selective nitride/oxide composite cap for improving transistor performanceTEXAS INSTRUMENTS INC·Filed 2003·Granted Aug 16, 2005·190 cites·2 claims
- 0292US7838356B2Gate dielectric first replacement gate processes and integrated circuits therefromTEXAS INSTRUMENTS INC·Filed 2008·Granted Nov 23, 2010·21 cites·24 claims
- 0389US8372703B2Gate dielectric first replacement gate processes and integrated circuits therefromTEXAS INSTRUMENTS INC·Filed 2010·Granted Feb 12, 2013·10 cites·11 claims
- 0488US5576992AExtended-life method for soft-programming floating-gate memory cellsTEXAS INSTRUMENTS INC·Filed 1995·Granted Nov 19, 1996·76 cites·12 claims
- 0586US6737333B2Semiconductor device isolation structure and method of formingTEXAS INSTRUMENTS INC·Filed 2002·Granted May 18, 2004·39 cites·12 claims
- 0683US6730554B1Multi-layer silicide block processTEXAS INSTRUMENTS INC·Filed 2002·Granted May 4, 2004·32 cites·11 claims
- 0781US5753952ANonvolatile memory cell with P-N junction formed in polysilicon floating gateTEXAS INSTRUMENTS INC·Filed 1995·Granted May 19, 1998·48 cites·6 claims
- 0879US6284599B1Method to fabricate a semiconductor resistor in embedded flash memory applicationTEXAS INSTRUMENTS INC·Filed 2000·Granted Sep 4, 2001·26 cites·11 claims
- 0978US6306737B1Method to reduce source-line resistance in flash memory with stiTEXAS INSTRUMENTS INC·Filed 2000·Granted Oct 23, 2001·30 cites·14 claims
- 1076US6803273B1Method to salicide source-line in flash memory with STITEXAS INSTRUMENTS INC·Filed 2000·Granted Oct 12, 2004·19 cites·14 claims
- 1176US6380031B1Method to form an embedded flash memory circuit with reduced process stepsTEXAS INSTRUMENTS INC·Filed 2000·Granted Apr 30, 2002·25 cites·11 claims
- 1274US7910422B2Reducing gate CD bias in CMOS processingTEXAS INSTRUMENTS INC·Filed 2008·Granted Mar 22, 2011·5 cites·26 claims
- 1373US7763540B2Method of forming a silicided gate utilizing a CMP stackTEXAS INSTRUMENTS INC·Filed 2007·Granted Jul 27, 2010·5 cites·13 claims
- 1473US7396716B2Method to obtain fully silicided poly gateTEXAS INSTRUMENTS INC·Filed 2005·Granted Jul 8, 2008·4 cites·16 claims
- 1573US7244642B2Method to obtain fully silicided gate electrodesTEXAS INSTRUMENTS INC·Filed 2005·Granted Jul 17, 2007·6 cites·15 claims
- 1673US6818526B2Method for moat nitride pull back for shallow trench isolationTEXAS INSTRUMENTS INC·Filed 2002·Granted Nov 16, 2004·21 cites·7 claims
- 1771US7943456B2Selective wet etch process for CMOS ICs having embedded strain inducing regions and integrated circuits therefromTEXAS INSTRUMENTS INC·Filed 2008·Granted May 17, 2011·4 cites·19 claims
- 1871US6524930B1Method for forming a bottom corner rounded STITEXAS INSTRUMENTS INC·Filed 2002·Granted Feb 25, 2003·18 cites·21 claims
- 1970US7045410B2Method to design for or modulate the CMOS transistor threshold voltage using shallow trench isolation (STI)TEXAS INSTRUMENTS INC·Filed 2004·Granted May 16, 2006·16 cites·6 claims
- 2068US5659500ANonvolatile memory array with compatible vertical source linesTEXAS INSTRUMENTS INC·Filed 1995·Granted Aug 19, 1997·24 cites·9 claims
- 2167US6897516B2Flash memory array structure and method of formingTEXAS INSTRUMENTS INC·Filed 2003·Granted May 24, 2005·9 cites·10 claims
- 2267US6268248B1Method of fabricating a source line in flash memory having STI structuresTEXAS INSTRUMENTS INC·Filed 1998·Granted Jul 31, 2001·23 cites·11 claims
- 2365US7585738B2Method of forming a fully silicided semiconductor device with independent gate and source/drain doping and related deviceTEXAS INSTRUMENTS INC·Filed 2007·Granted Sep 8, 2009·2 cites·13 claims
- 2463US7727842B2Method of simultaneously siliciding a polysilicon gate and source/drain of a semiconductor device, and related deviceTEXAS INSTRUMENTS INC·Filed 2007·Granted Jun 1, 2010·2 cites·20 claims
- 2563US6930018B2Shallow trench isolation structure and methodTEXAS INSTRUMENTS INC·Filed 2002·Granted Aug 16, 2005·10 cites·16 claims
- 2661US7112497B2Multi-layer reducible sidewall processTEXAS INSTRUMENTS INC·Filed 2004·Granted Sep 26, 2006·11 cites·15 claims
- 2761US6706605B1Transistor formed from stacked disposable sidewall spacerTEXAS INSTRUMENTS INC·Filed 2003·Granted Mar 16, 2004·9 cites·17 claims
- 2860US7504339B2Method to form shallow trench isolation with rounded upper corner for advanced semiconductor circuitsTEXAS INSTRUMENTS INC·Filed 2005·Granted Mar 17, 2009·1 cites·17 claims
- 2960US5604150AChannel-stop process for use with thick-field isolation regions in triple-well structuresTEXAS INSTRUMENTS INC·Filed 1995·Granted Feb 18, 1997·26 cites·20 claims
- 3059US8574980B2Method of forming fully silicided NMOS and PMOS semiconductor devices having independent polysilicon gate thicknesses, and related deviceMEHRAD FREIDOON·Filed 2007·Granted Nov 5, 2013·2 cites·18 claims
- 3159US5909397AMethod and system for testing and adjusting threshold voltages in flash eepromsTEXAS INSTRUMENTS INC·Filed 1997·Granted Jun 1, 1999·18 cites·9 claims
- 3258US6784056B2Flash memory cell process using a hardmaskTEXAS INSTRUMENTS INC·Filed 2003·Granted Aug 31, 2004·6 cites·5 claims
- 3357US7892906B2Method for forming CMOS transistors having FUSI gate electrodes and targeted work functionsTEXAS INSTRUMENTS INC·Filed 2008·Granted Feb 22, 2011·1 cites·24 claims
- 3457US6071779ASource line fabrication process for flash memoryTEXAS INSTRUMENTS INC·Filed 1999·Granted Jun 6, 2000·16 cites·10 claims
- 3554US6828213B2Method to improve STI nano gap fill and moat nitride pull backTEXAS INSTRUMENTS INC·Filed 2003·Granted Dec 7, 2004·6 cites·9 claims
- 3654US6677766B2Shallow trench isolation step height detection methodTEXAS INSTRUMENTS INC·Filed 2001·Granted Jan 13, 2004·4 cites·6 claims
- 3754US6451642B1Method to implant NMOS polycrystalline silicon in embedded FLASH memory applicationsTEXAS INSTRUMENTS INC·Filed 2000·Granted Sep 17, 2002·5 cites·6 claims
- 3853US6765257B1Implanted vertical source-line under straight stack for flash epromTEXAS INSTRUMENTS INC·Filed 1998·Granted Jul 20, 2004·12 cites·9 claims
- 3952US6566200B2Flash memory array structure and method of formingTEXAS INSTRUMENTS INC·Filed 2002·Granted May 20, 2003·4 cites·13 claims
- 4051US6348370B1Method to fabricate a self aligned source resistor in embedded flash memory applicationsTEXAS INSTRUMENTS INC·Filed 2000·Granted Feb 19, 2002·6 cites·5 claims
- 4150US7448395B2Process method to facilitate silicidationTEXAS INSTRUMENTS INC·Filed 2004·Granted Nov 11, 2008·3 cites·14 claims
- 4250US2009321846A1Method of Forming Fully Silicided NMOS and PMOS Semiconductor Devices Having Independent Polysilicon Gate Thicknesses, and Related DeviceTEXAS INSTRUMENTS INC·Filed 2009·Application pending·0 cites
- 4350US2008265345A1Method of Forming a Fully Silicided Semiconductor Device with Independent Gate and Source/Drain Doping and Related DeviceTEXAS INSTRUMENTS INC·Filed 2008·Application pending·0 cites
- 4448US7601575B2Integration of pre-S/D anneal selective nitride/oxide composite cap for improving transistor performanceTEXAS INSTRUMENTS INC·Filed 2005·Granted Oct 13, 2009·2 cites·18 claims
- 4548US6667210B2Flash memory cell process using a hardmaskTEXAS INSTRUMENTS INC·Filed 2001·Granted Dec 23, 2003·2 cites·11 claims
- 4648US6429093B1Sidewall process for forming a low resistance source lineTEXAS INSTRUMENTS INC·Filed 2000·Granted Aug 6, 2002·3 cites·14 claims
- 4748US6087220AStack etch method for flash memory devicesTEXAS INSTRUMENTS INC·Filed 1998·Granted Jul 11, 2000·12 cites·14 claims
- 4845US7960280B2Process method to fully salicide (FUSI) both N-poly and P-poly on a CMOS flowTEXAS INSTRUMENTS INC·Filed 2007·Granted Jun 14, 2011·0 cites·21 claims
- 4945US2008233747A1Semiconductor Device Manufactured Using an Improved Plasma Etch Process for a Fully Silicided Gate Flow ProcessTEXAS INSTRUMENTS INC·Filed 2007·Application pending·0 cites
- 5045US2008176345A1Ebeam inspection for detecting gate dielectric punch through and/or incomplete silicidation or metallization events for transistors having metal gate electrodesTEXAS INSTRUMENTS INC·Filed 2007·Application pending·0 cites
Showing the top 50 of 63 patent records by PatentIndex Score.
Join the waitlist — get patent alerts
Get an alert when Freidoon Mehrad files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →