Inventor · disambiguated record
Harold Pilo
Also filed as: PILO HAROLD
101 granted patents·8 pending applications·1,451 citations·filing 1992–2024
99Inventor score
Top patents by PatentIndex Score
109 records- 0197US8363453B2Static random access memory (SRAM) write assist circuit with leakage suppression and level controlIBM·Filed 2010·Granted Jan 29, 2013·41 cites·20 claims
- 0296US5666078AProgrammable impedance output driverIBM·Filed 1996·Granted Sep 9, 1997·229 cites·9 claims
- 0395US8279687B2Single supply sub VDD bit-line precharge SRAM and method for level shiftingADAMS CHAD A·Filed 2010·Granted Oct 2, 2012·31 cites·20 claims
- 0494US9564180B1Deep-sleep wake up for a memory deviceINVECAS INC·Filed 2016·Granted Feb 7, 2017·18 cites·20 claims
- 0594US8233342B2Apparatus and method for implementing write assist for static random access memory arraysADAMS CHAD A·Filed 2008·Granted Jul 31, 2012·43 cites·20 claims
- 0694US7643357B2System and method for integrating dynamic leakage reduction with write-assisted SRAM architectureIBM·Filed 2008·Granted Jan 5, 2010·40 cites·20 claims
- 0793US9318162B2Overvoltage protection for a fine grained negative wordline schemeIBM·Filed 2014·Granted Apr 19, 2016·10 cites·3 claims
- 0893US9123439B2SRAM write-assisted operation with VDD-to-VCS level shiftingIBM·Filed 2013·Granted Sep 1, 2015·17 cites·17 claims
- 0993US6219288B1Memory having user programmable AC timingsIBM·Filed 2000·Granted Apr 17, 2001·96 cites·14 claims
- 1092US9230637B1SRAM circuit with increased write marginGLOBALFOUNDRIES INC·Filed 2014·Granted Jan 5, 2016·20 cites·12 claims
- 1191US7904658B2Structure for power-efficient cache memoryIBM·Filed 2007·Granted Mar 8, 2011·27 cites·21 claims
- 1291US7724565B2Apparatus and method for small signal sensing in an SRAM cell utilizing PFET access devicesIBM·Filed 2007·Granted May 25, 2010·27 cites·5 claims
- 1390US6208572B1Semiconductor memory device having resistive bitline contact testingIBM·Filed 2000·Granted Mar 27, 2001·75 cites·20 claims
- 1490US6134182ACycle independent data to echo clock tracking circuitIBM·Filed 1999·Granted Oct 17, 2000·81 cites·7 claims
- 1590US6133749AVariable impedance output driver circuit using analog biases to match driver output impedance to load input impedanceIBM·Filed 1999·Granted Oct 17, 2000·68 cites·13 claims
- 1689US8228713B2SRAM having wordline up-level voltage adjustable to assist bitcell stability and design structure for sameARSOVSKI IGOR·Filed 2010·Granted Jul 24, 2012·13 cites·25 claims
- 1789US6509778B2BIST circuit for variable impedance systemIBM·Filed 2001·Granted Jan 21, 2003·43 cites·14 claims
- 1885US10650906B2Memory bypass function for a memorySYNOPSYS INC·Filed 2018·Granted May 12, 2020·5 cites·21 claims
- 1985US9058046B1Leakage-aware voltage regulation circuit and methodIBM·Filed 2013·Granted Jun 16, 2015·9 cites·20 claims
- 2084US8233337B2SRAM delay circuit that tracks bitcell characteristicsARSOVSKI IGOR·Filed 2009·Granted Jul 31, 2012·14 cites·25 claims
- 2184US7613050B2Sense-amplifier assist (SAA) with power-reduction techniqueIBM·Filed 2007·Granted Nov 3, 2009·15 cites·4 claims
- 2283US8630139B2Dual power supply memory array having a control circuit that dynamically selects a lower of two supply voltages for bitline pre-charge operations and an associated methodBRACERAS GEORGE M·Filed 2011·Granted Jan 14, 2014·9 cites·13 claims
- 2383US6754135B2Reduced latency wide-I/O burst architectureIBM·Filed 2002·Granted Jun 22, 2004·33 cites·14 claims
- 2482US8027207B2Leakage compensated reference voltage generation systemIBM·Filed 2009·Granted Sep 27, 2011·13 cites·20 claims
- 2582US7817481B2Column selectable self-biasing virtual voltages for SRAM write assistIBM·Filed 2008·Granted Oct 19, 2010·13 cites·14 claims
- 2682US7352609B2Voltage controlled static random access memoryIBM·Filed 2005·Granted Apr 1, 2008·9 cites·6 claims
- 2781US9734892B2Overvoltage protection for a fine grained negative wordline schemeIBM·Filed 2015·Granted Aug 15, 2017·3 cites·13 claims
- 2881US9734891B2Overvoltage protection for a fine grained negative wordline schemeIBM·Filed 2015·Granted Aug 15, 2017·3 cites·11 claims
- 2981US9679635B2Overvoltage protection for a fine grained negative wordline schemeIBM·Filed 2015·Granted Jun 13, 2017·3 cites·9 claims
- 3081US6400629B1System and method for early write to memory by holding bitline at fixed potentialIBM·Filed 2001·Granted Jun 4, 2002·30 cites·26 claims
- 3178US11017873B2Memory bypass function for a memorySYNOPSYS INC·Filed 2020·Granted May 25, 2021·1 cites·20 claims
- 3277US7403061B2Method of improving fuse state detection and yield in semiconductor applicationsIBM·Filed 2006·Granted Jul 22, 2008·7 cites·16 claims
- 3377US7400546B1Low overhead switched header power savings apparatusIBM·Filed 2007·Granted Jul 15, 2008·9 cites·2 claims
- 3477US6897674B2Adaptive integrated circuit based on transistor current measurementsIBM·Filed 2003·Granted May 24, 2005·16 cites·30 claims
- 3575US10706916B1Method and apparatus for integrated level-shifter and memory clockSYNOPSIS INC·Filed 2019·Granted Jul 7, 2020·3 cites·18 claims
- 3674US7573300B2Current control mechanism for dynamic logic keeper circuits in an integrated circuit and method of regulating sameIBM·Filed 2007·Granted Aug 11, 2009·7 cites·2 claims
- 3772US7486586B2Voltage controlled static random access memoryIBM·Filed 2007·Granted Feb 3, 2009·5 cites·29 claims
- 3871US9953698B2Overvoltage protection for a fine grained negative wordline schemeIBM·Filed 2017·Granted Apr 24, 2018·1 cites·16 claims
- 3971US8582351B2Methods and systems for adjusting wordline up-level voltage to improve production yield relative to SRAM-cell stabilityARSOVSKI IGOR·Filed 2010·Granted Nov 12, 2013·4 cites·19 claims
- 4071US7061793B2Apparatus and method for small signal sensing in an SRAM cell utilizing PFET access devicesIBM·Filed 2004·Granted Jun 13, 2006·15 cites·6 claims
- 4170US6999547B2Delay-lock-loop with improved accuracy and rangeIBM·Filed 2002·Granted Feb 14, 2006·16 cites·20 claims
- 4270US6449200B1Duty-cycle-efficient SRAM cell testIBM·Filed 2001·Granted Sep 10, 2002·18 cites·33 claims
- 4369US6998897B2System and method for implementing a micro-stepping delay chain for a delay locked loopIBM·Filed 2004·Granted Feb 14, 2006·13 cites·19 claims
- 4468US7466582B2Voltage controlled static random access memoryIBM·Filed 2007·Granted Dec 16, 2008·6 cites·3 claims
- 4567US9881666B2Overvoltage protection for a fine grained negative wordline schemeIBM·Filed 2015·Granted Jan 30, 2018·1 cites·12 claims
- 4667US7894291B2Circuit and method for controlling a standby voltage level of a memoryIBM·Filed 2005·Granted Feb 22, 2011·6 cites·20 claims
- 4767US7471114B2Design structure for a current control mechanism for power networks and dynamic logic keeper circuitsIBM·Filed 2007·Granted Dec 30, 2008·5 cites·17 claims
- 4866US7307457B2Apparatus for implementing dynamic data path with interlocked keeper and restore devicesIBM·Filed 2006·Granted Dec 11, 2007·6 cites·6 claims
- 4966US6967861B2Method and apparatus for improving cycle time in a quad data rate SRAM deviceIBM·Filed 2004·Granted Nov 22, 2005·14 cites·34 claims
- 5066US5343428AMemory having a latching BICMOS sense amplifierMOTOROLA INC·Filed 1992·Granted Aug 30, 1994·25 cites·17 claims
Showing the top 50 of 109 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →