Inventor · disambiguated record
Helia Naeimi
Also filed as: NAEIMI HELIA · NAEIMI HELIA A
26 granted patents·14 pending applications·145 citations·filing 2004–2023
94Inventor score
Top patents by PatentIndex Score
40 records- 0197US9299412B2Write operations in spin transfer torque memoryINTEL CORP·Filed 2014·Granted Mar 29, 2016·51 cites·25 claims
- 0295US9520192B2Resistive memory write operation with merged resetNAEIMI HELIA·Filed 2014·Granted Dec 13, 2016·31 cites·20 claims
- 0395US9342403B2Method and apparatus for managing a spin transfer torque memoryINTEL CORP·Filed 2014·Granted May 17, 2016·32 cites·32 claims
- 0490US9589620B1Destructive reads from spin transfer torque memory under read-write conditionsINTEL CORP·Filed 2015·Granted Mar 7, 2017·6 cites·13 claims
- 0585US12212600B2Offload of decryption operationsINTEL CORP·Filed 2021·Granted Jan 28, 2025·2 cites·17 claims
- 0679US11641326B2Shared memory mesh for switchingINTEL CORP·Filed 2019·Granted May 2, 2023·3 cites·22 claims
- 0768US9558807B2Apparatuses and systems for increasing a speed of removal of data stored in a memory cellINTEL CORP·Filed 2015·Granted Jan 31, 2017·2 cites·19 claims
- 0868US9335996B2Recycling error bits in floating point unitsINTEL CORP·Filed 2012·Granted May 10, 2016·2 cites·28 claims
- 0963US10061376B2Opportunistic power management for managing intermittent power available to data processing device having semi-non-volatile memory or non-volatile memoryINTEL CORP·Filed 2015·Granted Aug 28, 2018·1 cites·19 claims
- 1061US9892775B2Destructive reads from spin transfer torque memory under read-write conditionsINTEL CORP·Filed 2017·Granted Feb 13, 2018·1 cites·20 claims
- 1161US2023388281A1In-network compute operations utilizing encrypted communicationsINTEL CORP·Filed 2023·Application pending·0 cites
- 1261US2023393814A1In-network compute operationsINTEL CORP·Filed 2023·Application pending·0 cites
- 1360US10304510B2Destructive reads from spin transfer torque memory under read-write conditionsINTEL CORP·Filed 2018·Granted May 28, 2019·0 cites·12 claims
- 1459US7242601B2Deterministic addressing of nanoscale devices assembled at sublithographic pitchesCALIFORNIA INST OF TECHN·Filed 2004·Granted Jul 10, 2007·10 cites·37 claims
- 1558US8134341B2Energy harvesting based on user-interface of mobile computing deviceNAEIMI HELIA·Filed 2009·Granted Mar 13, 2012·1 cites·19 claims
- 1657US9747967B2Magnetic field-assisted memory operationINTEL CORP·Filed 2014·Granted Aug 29, 2017·1 cites·19 claims
- 1757US9514796B1Magnetic storage cell memory with back hop-preventionINTEL CORP·Filed 2015·Granted Dec 6, 2016·1 cites·20 claims
- 1854US11381515B2On-demand packet queuing in a network deviceINTEL CORP·Filed 2019·Granted Jul 5, 2022·0 cites·22 claims
- 1953US2023379154A1In-network compute operations utilizing encrypted communicationsINTEL CORP·Filed 2023·Application pending·0 cites
- 2053US2023379309A1In-network compute operations utilizing encrypted communicationsINTEL CORP·Filed 2023·Application pending·0 cites
- 2152US10713052B2Prefetcher for delinquent irregular loadsINTEL CORP·Filed 2018·Granted Jul 14, 2020·0 cites·25 claims
- 2252US9703626B2Recycling error bits in floating point unitsINTEL CORP·Filed 2016·Granted Jul 11, 2017·0 cites·20 claims
- 2351US10423540B2Apparatus, system, and method to determine a cache line in a first memory device to be evicted for an incoming cache line from a second memory deviceINTEL CORP·Filed 2017·Granted Sep 24, 2019·0 cites·25 claims
- 2451US8316283B2Hybrid error correction code (ECC) for a processorNAEIMI HELIA·Filed 2010·Granted Nov 20, 2012·1 cites·20 claims
- 2550US10467137B2Apparatus, system, integrated circuit die, and method to determine when to bypass a second level cache when evicting modified data from a first level cacheINTEL CORP·Filed 2017·Granted Nov 5, 2019·0 cites·25 claims
- 2649US2016188890A1Security mode data protectionINTEL CORP·Filed 2014·Application pending·0 cites
- 2748US2016378591A1Adaptive error correction in memory devicesINTEL CORP·Filed 2015·Application pending·0 cites
- 2847US9858984B2Apparatuses, methods, and systems for increasing a speed of removal of data from a memory cellINTEL CORP·Filed 2016·Granted Jan 2, 2018·0 cites·17 claims
- 2947US2023155988A1Packet security over multiple networksINTEL CORP·Filed 2023·Application pending·0 cites
- 3047US2023300063A1Network interface device-based computationsINTEL CORP·Filed 2023·Application pending·0 cites
- 3145US10297302B2Magnetic storage cell memory with back hop-preventionINTEL CORP·Filed 2016·Granted May 21, 2019·0 cites·20 claims
- 3245US9223544B2Number representation and memory system for arithmeticNAEIMI HELIA·Filed 2012·Granted Dec 29, 2015·0 cites·36 claims
- 3344US10552257B2Adaptive error correction in memory devicesINTEL CORP·Filed 2016·Granted Feb 4, 2020·0 cites·22 claims
- 3444US2018025764A1Magnetic field-assisted memory operationINTEL CORP·Filed 2017·Application pending·0 cites
- 3541US9978432B2Write operations in spin transfer torque memoryINTEL CORP·Filed 2014·Granted May 22, 2018·0 cites·12 claims
- 3640US2011156406A1Platform energy harvestingMA QING·Filed 2010·Application pending·0 cites
- 3740US2016188495A1Event triggered erasure for data securityINTEL CORP·Filed 2014·Application pending·0 cites
- 3839US2018173636A1Increasing lifetime reliability for a cache memoryINTEL CORP·Filed 2016·Application pending·0 cites
- 3936US2012221884A1Error management across hardware and software layersCARTER NICHOLAS P·Filed 2011·Application pending·0 cites
- 4031US2012079348A1Data with appended crc and residue value and encoder/decoder for sameNAEIMI HELIA·Filed 2010·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →