Inventor · disambiguated record
Hsin-Chang Lin
Also filed as: LIN HSIN · LIN HSIN C · LIN HSIN CHANG
23 granted patents·18 pending applications·197 citations·filing 1996–2024
94Inventor score
Files withYIELD MICROELECTRONICS CORP15LIN HSIN CHANG13REALTEK SEMICONDUCTOR CORP4AUO CORP2WINBOND ELECTRONICS CORP2
Top patents by PatentIndex Score
41 records- 0192US7423903B2Single-gate non-volatile memory and operation method thereofYIELD MICROELECTRONICS CORP·Filed 2006·Granted Sep 9, 2008·37 cites·7 claims
- 0290US7099192B2Nonvolatile flash memory and method of operating the sameYIELD MICROELECTRONICS CORP·Filed 2004·Granted Aug 29, 2006·81 cites·9 claims
- 0380US8218369B2Non-volatile memory low voltage and high speed erasure methodLIN HSIN CHANG·Filed 2010·Granted Jul 10, 2012·7 cites·4 claims
- 0479US8305808B2Low-voltage EEPROM arrayLIN HSIN CHANG·Filed 2010·Granted Nov 6, 2012·9 cites·7 claims
- 0578US9240242B1Method for operating low-cost EEPROM arrayYIELD MICROELECTRONICS CORP·Filed 2014·Granted Jan 19, 2016·7 cites·20 claims
- 0672US9318208B1Method for operating small-area EEPROM arrayYIELD MICROELECTRONICS CORP·Filed 2014·Granted Apr 19, 2016·5 cites·18 claims
- 0769US10141057B1Erasing method of single-gate non-volatile memoryYIELD MICROELECTRONICS CORP·Filed 2017·Granted Nov 27, 2018·2 cites·3 claims
- 0868US5818086AReinforced ESD protection for NC-pin adjacent input pinWINBOND ELECTRONICS CORP·Filed 1996·Granted Oct 6, 1998·29 cites·3 claims
- 0963US10685716B1Method of fast erasing low-current EEPROM arrayYIELD MICROELECTRONICS CORP·Filed 2019·Granted Jun 16, 2020·1 cites·14 claims
- 1058US12376251B2Eletronic deviceWISTRON NEWEB CORP·Filed 2023·Granted Jul 29, 2025·0 cites·10 claims
- 1158US11862864B2Low-loss true time-delay phase shifterANALOG DEVICES INC·Filed 2021·Granted Jan 2, 2024·0 cites·20 claims
- 1258US2025189722A1Waveguide elementAUO CORP·Filed 2024·Application pending·0 cites
- 1357US2025389961A1Light-transmitting deviceAUO CORP·Filed 2024·Application pending·0 cites
- 1452US11455449B2Method for determining IC voltage and method for finding relation between voltages and circuit parametersREALTEK SEMICONDUCTOR CORP·Filed 2019·Granted Sep 27, 2022·0 cites·12 claims
- 1552US8300461B2Area saving electrically-erasable-programmable read-only memory (EEPROM) arrayLIN HSIN CHANG·Filed 2010·Granted Oct 30, 2012·2 cites·23 claims
- 1651US8300469B2Cost saving electrically-erasable-programmable read-only memory (EEPROM) arrayLIN HSIN CHANG·Filed 2010·Granted Oct 30, 2012·2 cites·16 claims
- 1750US7508253B1Charge pump device and operating method thereofYIELD MICROELECTRONICS CORP·Filed 2007·Granted Mar 24, 2009·3 cites·12 claims
- 1848US2010131535A1Geographic location identify system with open-type identifier and method for generating the identifierLIN HSIN-CHANG·Filed 2009·Application pending·0 cites
- 1948US2012197814A1Content endorsementLIN HSIN·Filed 2011·Application pending·0 cites
- 2046US2008173915A1Single-gate non-volatile memory and operation method thereofLIN HSIN-CHANG·Filed 2008·Application pending·0 cites
- 2144US9601202B2Low voltage difference operated EEPROM and operating method thereofYIELD MICROELECTRONICS CORP·Filed 2016·Granted Mar 21, 2017·0 cites·4 claims
- 2244US2019384868A1Method and apparatus for adaptive voltage scaling to eliminate delay variation of whole designREALTEK SEMICONDUCTOR CORP·Filed 2019·Application pending·0 cites
- 2342US5998869AHigh storage capacity, wide data input/output channel, static random access memory deviceWINBOND ELECTRONICS CORP·Filed 1997·Granted Dec 7, 1999·12 cites·7 claims
- 2441US11416665B2Power rail design method, apparatus and non-transitory computer readable medium thereofREALTEK SEMICONDUCTOR CORP·Filed 2020·Granted Aug 16, 2022·0 cites·11 claims
- 2541US9281312B2Non-volatile memory with a single gate-source common terminal and operation method thereofYIELD MICROELECTRONICS CORP·Filed 2014·Granted Mar 8, 2016·0 cites·16 claims
- 2641US2018052506A1Voltage and frequency scaling apparatus, system on chip and voltage and frequency scaling methodREALTEK SEMICONDUCTOR CORP·Filed 2017·Application pending·0 cites
- 2740US2016329104A1Low voltage difference operated eeprom and operating method thereofYIELD MICROELECTRONICS CORP·Filed 2015·Application pending·0 cites
- 2839US9548382B2Spintronic deviceUNIV NORTHEASTERN·Filed 2013·Granted Jan 17, 2017·0 cites·20 claims
- 2939US2020327944A1Method of fast erasing an eeprom with low-voltages, where ions are implanted at a higher concentration to increase the intensity of the electric field between the gate and the substrate or between the gate and the transistor and thus decrease the required voltage difference for erasing the eepromYIELD MICROELECTRONICS CORP·Filed 2019·Application pending·0 cites
- 3039US2009185429A1Non-volatile memory with single floating gate and method for operating the sameLIN HSIN CHANG·Filed 2008·Application pending·0 cites
- 3136US11130102B2Mixer with wireless power transmissionTAI CHENG CHI·Filed 2018·Granted Sep 28, 2021·0 cites·6 claims
- 3236US2007158733A1High-speed low-voltage programming and self-convergent high-speed low-voltage erasing schemes for EEPROMYIELD MICROELECTRONICS CORP·Filed 2006·Application pending·0 cites
- 3336US2008035973A1Low-noise single-gate non-volatile memory and operation method thereofLIN HSIN CHANG·Filed 2006·Application pending·0 cites
- 3435US10643708B1Method for operating low-current EEPROM arrayYIELD MICROELECTRONICS CORP·Filed 2018·Granted May 5, 2020·0 cites·14 claims
- 3535US2013334586A1Non-self-aligned non-volatile memory structureLIN HSIN CHANG·Filed 2012·Application pending·0 cites
- 3635US2020350328A1Single-gate multiple-time programming non-volatile memory and operation method thereofYIELD MICROELECTRONICS CORP·Filed 2019·Application pending·0 cites
- 3734US10242741B1Low voltage difference operated EEPROM and operating method thereofYIELD MICROELECTRONICS CORP·Filed 2017·Granted Mar 26, 2019·0 cites·12 claims
- 3834US2013181276A1Non-self aligned non-volatile memory structureLIN HSIN CHANG·Filed 2012·Application pending·0 cites
- 3934US2007241392A1Non-volatile flash memory structure and method for operating the sameLIN HSIN-CHANG·Filed 2006·Application pending·0 cites
- 4032US2012040504A1Method for integrating dram and nvmLIN HSIN CHANG·Filed 2010·Application pending·0 cites
- 4130US2011286281A1Reference current generator used for programming and erasing of non-volatile memoryLIN HSIN CHANG·Filed 2010·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →