Inventor · disambiguated record
Igor Yanover
Also filed as: YANOVER IGOR
39 granted patents·6 pending applications·108 citations·filing 2010–2024
97Inventor score
Top patents by PatentIndex Score
45 records- 0198US11977886B2Systems, methods, and apparatuses for tile storeINTEL CORP·Filed 2022·Granted May 7, 2024·7 cites·20 claims
- 0298US11714642B2Systems, methods, and apparatuses for tile storeINTEL CORP·Filed 2022·Granted Aug 1, 2023·7 cites·19 claims
- 0398US11086623B2Systems, methods, and apparatuses for tile matrix multiplication and accumulationINTEL CORP·Filed 2017·Granted Aug 10, 2021·32 cites·20 claims
- 0496US11567765B2Systems, methods, and apparatuses for tile loadINTEL CORP·Filed 2017·Granted Jan 31, 2023·8 cites·20 claims
- 0595US11288069B2Systems, methods, and apparatuses for tile storeINTEL CORP·Filed 2017·Granted Mar 29, 2022·7 cites·17 claims
- 0694US11915000B2Apparatuses, methods, and systems to precisely monitor memory store accessesINTEL CORP·Filed 2023·Granted Feb 27, 2024·2 cites·27 claims
- 0792US8972697B2Gather using index array and finite state machineSPERBER ZEEV·Filed 2012·Granted Mar 3, 2015·17 cites·26 claims
- 0892US2025117222A1Systems, methods, and apparatuses for tile matrix multiplication and accumulationINTEL CORP·Filed 2024·Application pending·0 cites
- 0990US12147804B2Systems, methods, and apparatuses for tile matrix multiplication and accumulationINTEL CORP·Filed 2021·Granted Nov 19, 2024·1 cites·21 claims
- 1090US2025004716A1Systems, methods, and apparatuses for tile loadINTEL CORP·Filed 2024·Application pending·0 cites
- 1189US2024192954A1Systems, methods, and apparatuses for matrix operationsINTEL CORP·Filed 2024·Application pending·0 cites
- 1287US11392380B2Apparatuses, methods, and systems to precisely monitor memory store accessesINTEL CORP·Filed 2019·Granted Jul 19, 2022·3 cites·24 claims
- 1385US12182571B2Systems, methods, and apparatuses for tile load, multiplication and accumulationINTEL CORP·Filed 2023·Granted Dec 31, 2024·0 cites·20 claims
- 1483US10152451B2Scatter using index array and finite state machineINTEL CORP·Filed 2017·Granted Dec 11, 2018·3 cites·8 claims
- 1583US9753889B2Gather using index array and finite state machineINTEL CORP·Filed 2015·Granted Sep 5, 2017·3 cites·17 claims
- 1682US11580031B2Hardware for split data translation lookaside buffersINTEL CORP·Filed 2020·Granted Feb 14, 2023·2 cites·24 claims
- 1781US12271735B2Apparatuses, methods, and systems toprecisely monitor memory store accessesINTEL CORP·Filed 2024·Granted Apr 8, 2025·0 cites·20 claims
- 1878US10146737B2Gather using index array and finite state machineINTEL CORP·Filed 2015·Granted Dec 4, 2018·2 cites·18 claims
- 1978US9626333B2Scatter using index array and finite state machineSPERBER ZEEV·Filed 2012·Granted Apr 18, 2017·5 cites·22 claims
- 2077US10324857B2Linear memory address transformation and managementINTEL CORP·Filed 2017·Granted Jun 18, 2019·2 cites·22 claims
- 2176US10942738B2Accelerator systems and methods for matrix operationsINTEL CORP·Filed 2019·Granted Mar 9, 2021·2 cites·28 claims
- 2275US12099597B2Apparatus and method for power virus protection in a processorINTEL CORP·Filed 2023·Granted Sep 24, 2024·0 cites·20 claims
- 2373US10402263B2Accelerating memory fault resolution by performing fast re-fetchingINTEL CORP·Filed 2017·Granted Sep 3, 2019·1 cites·20 claims
- 2472US12106100B2Systems, methods, and apparatuses for matrix operationsINTEL CORP·Filed 2017·Granted Oct 1, 2024·0 cites·19 claims
- 2572US2023082290A1Apparatuses, methods, and systems to precisely monitor memory store accessesINTEL CORP·Filed 2022·Application pending·0 cites
- 2670US9996127B2Method and apparatus for proactive throttling for improved power transitions in a processor coreINTEL CORP·Filed 2014·Granted Jun 12, 2018·2 cites·19 claims
- 2763US11966334B2Apparatuses, methods, and systems for selective linear address masking based on processor privilege level and control register bitsINTEL CORP·Filed 2021·Granted Apr 23, 2024·0 cites·24 claims
- 2863US10891230B1Apparatuses, methods, and systems for selective linear address masking based on processor privilege level and control register bitsINTEL CORP·Filed 2019·Granted Jan 12, 2021·0 cites·24 claims
- 2962US11809549B2Apparatus and method for power virus protection in a processorINTEL CORP·Filed 2019·Granted Nov 7, 2023·0 cites·20 claims
- 3062US11385704B2Adjusting a throttling threshold in a processorINTEL CORP·Filed 2021·Granted Jul 12, 2022·0 cites·20 claims
- 3160US11150979B2Accelerating memory fault resolution by performing fast re-fetchingINTEL CORP·Filed 2019·Granted Oct 19, 2021·0 cites·20 claims
- 3257US10936041B2Adjusting a throttling threshold in a processorINTEL CORP·Filed 2019·Granted Mar 2, 2021·0 cites·20 claims
- 3355US11681533B2Restricted speculative execution mode to prevent observable side effectsINTEL CORP·Filed 2019·Granted Jun 20, 2023·0 cites·15 claims
- 3454US9411728B2Methods and apparatus for efficient communication between caches in hierarchical caching designSHALEV RON·Filed 2011·Granted Aug 9, 2016·1 cites·22 claims
- 3553US11392503B2Memory tagging apparatus and methodINTEL CORP·Filed 2019·Granted Jul 19, 2022·0 cites·30 claims
- 3652US11656998B2Memory tagging metadata manipulationINTEL CORP·Filed 2019·Granted May 23, 2023·0 cites·17 claims
- 3752US8516577B2Regulating atomic memory operations to prevent denial of service attackBAIR MICHAEL S·Filed 2010·Granted Aug 20, 2013·1 cites·20 claims
- 3851US11693785B2Memory tagging apparatus and methodINTEL CORP·Filed 2019·Granted Jul 4, 2023·0 cites·20 claims
- 3949US9292362B2Method and apparatus to protect a processor against excessive power usageINTEL CORP·Filed 2013·Granted Mar 22, 2016·0 cites·20 claims
- 4048US10095522B2Instruction and logic for register based hardware memory renamingINTEL CORP·Filed 2014·Granted Oct 9, 2018·0 cites·20 claims
- 4146US11544062B2Apparatus and method for store pairing with reduced hardware requirementsINTEL CORP·Filed 2020·Granted Jan 3, 2023·0 cites·15 claims
- 4246US2020410094A1Hardware load hardening for speculative side-channel attacksINTEL CORP·Filed 2019·Application pending·0 cites
- 4344US10303605B2Increasing invalid to modified protocol occurrences in a computing systemINTEL CORP·Filed 2016·Granted May 28, 2019·0 cites·15 claims
- 4443US9710389B2Method and apparatus for memory aliasing detection in an out-of-order instruction execution platformINTEL CORP·Filed 2015·Granted Jul 18, 2017·0 cites·24 claims
- 4535US2017286121A1Apparatus and method for re-execution of faulting operationsHILDESHEIM GUR·Filed 2016·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →