Inventor · disambiguated record
Ilhyun Kim
Also filed as: KIM ILHYUN
17 granted patents·6 pending applications·39 citations·filing 2005–2025
90Inventor score
Top patents by PatentIndex Score
23 records- 0190US10409612B2Apparatus and method for transactional memory and lock elision including an abort instruction to abort speculative executionINTEL CORP·Filed 2015·Granted Sep 10, 2019·7 cites·20 claims
- 0277US8438369B2Providing thread fairness by biasing selection away from a stalling thread using a stall-cycle counter in a hyper-threaded microprocessorMARDEN MORRIS·Filed 2010·Granted May 7, 2013·4 cites·13 claims
- 0375US2025321744A1Using a Next Fetch Predictor Circuit with Short Branches and Return Fetch GroupsAPPLE INC·Filed 2025·Application pending·0 cites
- 0471US8433850B2Method and apparatus for pipeline inclusion and instruction restarts in a micro-op cache of a processorRAPPOPORT LIHU·Filed 2008·Granted Apr 30, 2013·6 cites·20 claims
- 0570US8990868B2Display device and method for displaying contents on the sameLEE JUNGBIN·Filed 2011·Granted Mar 24, 2015·5 cites·12 claims
- 0670US8521993B2Providing thread fairness by biasing selection away from a stalling thread using a stall-cycle counter in a hyper-threaded microprocessorMARDEN MORRIS·Filed 2007·Granted Aug 27, 2013·4 cites·4 claims
- 0767US8127085B2Method and apparatus for pipeline inclusion and instruction restarts in a micro-op cache of a processorRAPPOPORT LIHU·Filed 2008·Granted Feb 28, 2012·4 cites·16 claims
- 0866US7925834B2Tracking temporal use associated with cache evictionsINTEL CORP·Filed 2007·Granted Apr 12, 2011·5 cites·16 claims
- 0965US12373215B2Using a next fetch predictor circuit with short branches and return fetch groupsAPPLE INC·Filed 2022·Granted Jul 29, 2025·0 cites·20 claims
- 1063US9524191B2Apparatus including a stall counter to bias processing element selection, and masks to allocate reservation unit entries to one or more processing elementsMARDEN MORRIS·Filed 2010·Granted Dec 20, 2016·1 cites·12 claims
- 1161US12265823B2Trace cache with filter for internal control transfer inclusionAPPLE INC·Filed 2023·Granted Apr 1, 2025·0 cites·20 claims
- 1261US9348591B2Multi-level tracking of in-use state of cache linesKIM ILHYUN·Filed 2011·Granted May 24, 2016·2 cites·14 claims
- 1360US9521241B2Mobile terminal and method of controlling the sameLG ELECTRONICS INC·Filed 2014·Granted Dec 13, 2016·1 cites·12 claims
- 1456US12353882B1Next fetch prediction using historyAPPLE INC·Filed 2023·Granted Jul 8, 2025·0 cites·17 claims
- 1556US2017161106A1Providing thread fairness in a hyper-threaded microprocessorINTEL CORP·Filed 2016·Application pending·0 cites
- 1654US10409611B2Apparatus and method for transactional memory and lock elision including abort and end instructions to abort or commit speculative executionINTEL CORP·Filed 2015·Granted Sep 10, 2019·0 cites·20 claims
- 1751US12256036B2Mobile terminalLG ELECTRONICS INC·Filed 2019·Granted Mar 18, 2025·0 cites·9 claims
- 1851US2025315262A1Hierarchical Trace CacheAPPLE INC·Filed 2024·Application pending·0 cites
- 1950US2014059333A1Method, apparatus, and system for speculative abort control mechanismsDIXON MARTIN G·Filed 2012·Application pending·0 cites
- 2045US2006062993A1Laminated member for automobile interior ceiling materialOJI INTERPACK CO LTD·Filed 2005·Application pending·0 cites
- 2144US10453637B2Direct current air circuit breakerLSIS CO LTD·Filed 2018·Granted Oct 22, 2019·0 cites·7 claims
- 2240US2008065865A1In-use bits for efficient instruction fetch operationsKIM ILHYUN·Filed 2006·Application pending·0 cites
- 2338US9158696B2Hiding instruction cache miss latency by running tag lookups ahead of the instruction accessesKIM ILHYUN·Filed 2011·Granted Oct 13, 2015·0 cites·21 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →