Method, apparatus, and system for speculative abort control mechanisms

Abstract

An apparatus and method is described herein for providing robust speculative code section abort control mechanisms. Hardware is able to track speculative code region abort events, conditions, and/or scenarios, such as an explicit abort instruction, a data conflict, a speculative timer expiration, a disallowed instruction attribute or type, etc. And hardware, firmware, software, or a combination thereof makes an abort determination based on the tracked abort events. As an example, hardware may make an initial abort determination based on one or more predefined events or choose to pass the event information up to a firmware or software handler to make such an abort determination. Upon determining an abort of a speculative code region is to be performed, hardware, firmware, software, or a combination thereof performs the abort, which may include following a fallback path specified by hardware or software. And to enable testing of such a fallback path, in one implementation, hardware provides software a mechanism to always abort speculative code regions.

What is claimed is: 
     
         1 . An apparatus comprising:
 abort tracking event logic configured to track a plurality of abort events associated with execution of a speculative code region;   a register coupled to the abort tracking event logic, the register being configured to hold a representation of which of the plurality of abort events were tracked by the abort tracking event logic during execution of the speculative code region; and   abort logic coupled to the register, the abort logic being configured to determine an abort of the speculative code region is to be performed based on the representation of which of the plurality of abort events were tracked held in the register; and   abort processing logic coupled to the abort logic, the abort processing logic configured to abort the execution of the speculative code region.   
     
     
         2 . The apparatus of  claim 1 , wherein the speculative code region includes a transaction. 
     
     
         3 . The apparatus of  claim 1 , wherein the speculative code region includes a critical section. 
     
     
         4 . The apparatus of  claim 1 , wherein one of the plurality of abort events a disallowed instruction attribute selected from a group consisting of x87, Mult-Media eXtensions (MMX), Single Instruction Multiple Data (SIMD), SIMD Extensions (SSE), Virtual Machine eXtensions (VMX), Safer Mode eXtensions (SMX). 
     
     
         5 . The apparatus of  claim 1 , wherein the plurality of abort events are selected from a group consisting of an explicit abort instruction, a memory address conflict, a buffer overflow, a debug breakpoint hit, a nested transaction event, an abort timer expiration, a persistent memory access; a non-speculative memory access; a memory ordering violation, a disallowed instruction, an disallowed instruction attribute, and a disallowed memory type operation. 
     
     
         6 . The apparatus of  claim 1 , wherein a register coupled to the abort tracking event logic, the register being configured to hold a representation of which of the plurality of abort events were tracked by the abort tracking event logic during execution of the speculative code region comprises the register being configured as a bitmap, wherein each bit of the bit map set to a predefined value represents a corresponding abort event of the plurality of abort events was tracked during execution of the speculative code region. 
     
     
         7 . The apparatus of  claim 1 , wherein the abort logic is further configured to determine an abort of the speculative code region is to be performed based on the representation of which of the plurality of abort events were tracked held in the register without intervention of software. 
     
     
         8 . The apparatus of  claim 1 , wherein the abort logic is further configured to determine an abort of the speculative code region is to be performed based on the representation of which of the plurality of abort events were tracked held in the register without intervention of software. 
     
     
         9 . The apparatus of  claim 1 , wherein the abort processing logic configured to abort the execution of the speculative code region comprises the abort processing logic being configured to rollback an architecture state to a beginning of the speculative code region, discarding memory state updates made during execution of the speculative code region, and following a fallback path specified by software at the beginning of the speculative code region. 
     
     
         10 . A method comprising:
 detecting an abort event during execution of a speculative code region;   indicating in a storage element for representing a plurality of abort events that the abort event was detected during execution of the speculative code region;   determining if an abort of the speculative code region should be performed based on indicating in the storage element that the abort event was detected during execution of the speculative code region; and   initiating the abort of the speculative code region in response to determining the abort of the speculative code region should be performed.   
     
     
         11 . The method of  claim 10 , wherein the abort event includes an event selected from a group consisting of an explicit abort instruction, a memory address conflict, and an abort timer expiration. 
     
     
         12 . The method of  claim 10 , wherein indicating in a storage element for representing a plurality of abort events that the abort event was detected during execution of the speculative code region comprises: setting a bit in the storage element that is to represent the abort event was detected during execution of the speculative code region. 
     
     
         13 . The method of  claim 10 , wherein determining if an abort of the speculative code region should be performed based on indicating in the storage element that the abort event was detected during execution of the speculative code region comprises: determining in hardware without software intervention that the abort of the speculative code region should be performed based on a type of the abort event that was detected during execution of the speculative code region. 
     
     
         14 . The method of  claim 10 , wherein determining if an abort of the speculative code region should be performed based on indicating in the storage element that the abort event was detected during execution of the speculative code region comprises:
 informing a code layer of the abort event was detected during execution of the speculative code region; and   determining with execution of handler code from the code layer that the abort of the speculative code region should be performed based on a type of the abort event that was detected during execution of the speculative code region.   
     
     
         15 . The method of  claim 14 , wherein the code layer includes a layer selected from a group consisting of a microcode layer, a privileged level software layer, and a user-level application layer. 
     
     
         16 . A non-transitory computer readable medium including code, when executed, to cause a machine to perform the operations of:
 receiving abort event information associated with execution of a speculative code region;   determining if an abort of the speculative code region should be performed based on the abort information;   indicating the abort of the speculative code region should be performed in response to determining the abort of the speculative code region should be performed.   
     
     
         17 . The non-transitory computer readable medium of  claim 16 , wherein the abort event information includes a representation of an abort event, and wherein receiving abort event information associated with execution of a speculative code region comprises: asynchronous interrupt-like indication that the abort event is associated with the speculative code region. 
     
     
         18 . The non-transitory computer readable medium of  claim 16 , wherein the abort event information includes a representation of an abort event, and wherein receiving abort event information associated with execution of a speculative code region comprises: loading the representation of the abort event from an abort register holding the representation of the abort event in response to an abort event instructions from the code. 
     
     
         19 . An apparatus comprising:
 decode logic configured to decode a begin speculative code region instruction to start execution of a speculative code region;   a timer configured to count from a timeout value in response to decode logic decoding the begin speculative code region instruction; and   abort logic configured to initiate an abort of the speculative code region in response to the timer expiring after a period including the timeout value and decode logic not decoding an end speculative code region instruction.   
     
     
         20 . The apparatus of  claim 19 , wherein the timeout value is programmable by user-level software including the speculative code region. 
     
     
         21 . The apparatus of  claim 19 , wherein the timeout value is predefined in the timer. 
     
     
         22 . The apparatus of  claim 19 , wherein the speculative code region includes a critical section. 
     
     
         23 . The apparatus of  claim 19 , wherein the speculative code region includes a transaction. 
     
     
         24 . A method comprising:
 beginning execution of a speculative code region;   setting a timer with a timeout value in response to beginning execution of the speculative code region;   counting a period based on the timeout value in response to setting the timer with the timeout value;   updating an abort event register to indicate the timer expired during execution of the speculative code region in response to counting the period and not committing the speculative code region.   
     
     
         25 . The method of claim . 24 , further comprising;
 determining the speculative code region is to be aborted in hardware without software intervention in response to updating an abort event register to indicate the timer expired during execution of the speculative code region; and   initiating an abort of the speculative code region in response to determining the speculative code region is to be aborted.   
     
     
         26 . The method of  claim 24 , further comprising:
 indicating to code that the timer expired during execution of the speculative code region in response to updating an abort event register to indicate the timer expired during execution of the speculative code region;   determining the speculative code region is to be aborted with intervention of code in response to updating an abort event register to indicate the timer expired during execution of the speculative code region; and   initiating an abort of the speculative code region in response to determining the speculative code region is to be aborted.   
     
     
         27 . The method of  claim 26 , wherein the code is selected from a group consisting of microcode, operating system code, hypervisor code, application code, library code, and user-level code. 
     
     
         28 . A system comprising:
 a processor including abort event logic configured to detect abort events during execution of a speculative code region, an abort event register configured to track abort events detected by the abort event logic, and storage to. hold processor code, when executed by the processor, to:
 interpret the abort event register to determine abort events detected during execution of the speculative code region, and 
 determine if the speculative code region is to be aborted, the abort events detected during execution of the speculative code region are to be ignored, or the abort events detected during execution of the speculative code region are to be passed to software for an abort determination; and 
   a memory coupled to the processor to hold software code, when executed, to:
 receive the abort events detected during execution of the speculative code region in response to the processor code, when executed by the processor, determines the abort events detected during execution of the speculative code region are to be passed to software for an abort determination, and 
 make the abort determination based on the abort events detected during execution of the speculative code region. 
   
     
     
         29 . The system of  claim 28 , wherein the processor code includes a microcode handler and the software code includes a user-level handler. 
     
     
         30 . The system of  claim 28 , wherein the abort event register includes a bit map corresponding to a number of possible abort events, and wherein the abort event register is configured to track abort events detected by the abort event logic comprises bits of the bit map corresponding to the abort events detected during execution of the speculative code region being set to a tracked value.