Inventor · disambiguated record
Isaac Lauer
Also filed as: LAUER ISAAC
192 granted patents·29 pending applications·1,043 citations·filing 2007–2024
99Inventor score
Top patents by PatentIndex Score
221 records- 0199US9755017B1Co-integration of silicon and silicon-germanium channels for nanosheet devicesIBM·Filed 2016·Granted Sep 5, 2017·48 cites·18 claims
- 0299US9647139B2Atomic layer deposition sealing integration for nanosheet complementary metal oxide semiconductor with replacement spacerIBM·Filed 2015·Granted May 9, 2017·34 cites·14 claims
- 0398US9748404B1Method for fabricating a semiconductor device including gate-to-bulk substrate isolationIBM·Filed 2016·Granted Aug 29, 2017·32 cites·18 claims
- 0498US8785981B1Non-replacement gate nanomesh field effect transistor with pad regionsIBM·Filed 2013·Granted Jul 22, 2014·49 cites·10 claims
- 0598US8669615B1Techniques for metal gate workfunction engineering to enable multiple threshold voltage FINFET devicesCHANG JOSEPHINE B·Filed 2012·Granted Mar 11, 2014·47 cites·15 claims
- 0697US11469485B2Embedded microstrip transmission lineIBM·Filed 2020·Granted Oct 11, 2022·5 cites·18 claims
- 0797US9911592B2Method for making nanosheet CMOS device integrating atomic layer deposition process and replacement gate structureIBM·Filed 2016·Granted Mar 6, 2018·13 cites·19 claims
- 0897US9653547B1Integrated etch stop for capped gate and method for manufacturing the sameIBM·Filed 2016·Granted May 16, 2017·22 cites·17 claims
- 0997US8809131B2Replacement gate fin first wire last gate all around devicesBANGSARUNTIP SARUNYA·Filed 2012·Granted Aug 19, 2014·35 cites·26 claims
- 1097US8716091B2Structure for self-aligned silicide contacts to an upside-down FET by epitaxial source and drainCOHEN GUY·Filed 2010·Granted May 6, 2014·32 cites·5 claims
- 1197US8658518B1Techniques for metal gate work function engineering to enable multiple threshold voltage nanowire FET devicesCHANG JOSEPHINE B·Filed 2012·Granted Feb 25, 2014·29 cites·20 claims
- 1296US11223347B1All microwave ZZ controlIBM·Filed 2020·Granted Jan 11, 2022·8 cites·24 claims
- 1395US9812321B2Method for making nanosheet CMOS device integrating atomic layer deposition process and replacement gate structureIBM·Filed 2016·Granted Nov 7, 2017·8 cites·20 claims
- 1495US9431301B1Nanowire field effect transistor (FET) and method for fabricating the sameIBM·Filed 2015·Granted Aug 30, 2016·11 cites·14 claims
- 1595US9209095B2III-V, Ge, or SiGe fin base lateral bipolar transistor structure and methodIBM·Filed 2014·Granted Dec 8, 2015·18 cites·18 claims
- 1695US8928083B2Diode structure and method for FINFET technologiesIBM·Filed 2013·Granted Jan 6, 2015·18 cites·10 claims
- 1795US8900959B2Non-replacement gate nanomesh field effect transistor with pad regionsIBM·Filed 2013·Granted Dec 2, 2014·18 cites·15 claims
- 1895US8673731B2Techniques for gate workfunction engineering to reduce short channel effects in planar CMOS devicesCHANG JOSEPHINE B·Filed 2012·Granted Mar 18, 2014·19 cites·19 claims
- 1995US8669167B1Techniques for metal gate workfunction engineering to enable multiple threshold voltage FINFET devicesCHANG JOSEPHINE B·Filed 2012·Granted Mar 11, 2014·19 cites·19 claims
- 2095US8173993B2Gate-all-around nanowire tunnel field effect transistorsBANGSARUNTIP SARUNYA·Filed 2009·Granted May 8, 2012·35 cites·27 claims
- 2194US10037885B2Atomic layer deposition sealing integration for nanosheet complementary metal oxide semiconductor with replacement spacerIBM·Filed 2017·Granted Jul 31, 2018·6 cites·20 claims
- 2294US9536794B2Techniques for dual dielectric thickness for a nanowire CMOS technology using oxygen growthIBM·Filed 2015·Granted Jan 3, 2017·10 cites·20 claims
- 2394US9391163B2Stacked planar double-gate lamellar field-effect transistorIBM·Filed 2014·Granted Jul 12, 2016·11 cites·1 claims
- 2494US9362354B1Tuning gate lengths in semiconductor device structuresIBM·Filed 2015·Granted Jun 7, 2016·10 cites·15 claims
- 2594US8324030B2Nanowire tunnel field effect transistorsBANGSARUNTIP SARUNYA·Filed 2010·Granted Dec 4, 2012·17 cites·14 claims
- 2694US8258031B2Fabrication of a vertical heterojunction tunnel-FETLAUER ISAAC·Filed 2010·Granted Sep 4, 2012·19 cites·16 claims
- 2793US10217817B2Sacrificial layer for channel surface retention and inner spacer formation in stacked-channel FETsIBM·Filed 2016·Granted Feb 26, 2019·7 cites·18 claims
- 2893US9812370B2III-V, SiGe, or Ge base lateral bipolar transistor and CMOS hybrid technologyIBM·Filed 2016·Granted Nov 7, 2017·7 cites·10 claims
- 2993US9627378B2Methods of forming FINFETs with locally thinned channels from fins having in-situ doped epitaxial claddingIBM·Filed 2015·Granted Apr 18, 2017·7 cites·15 claims
- 3093US9006087B2Diode structure and method for wire-last nanomesh technologiesIBM·Filed 2013·Granted Apr 14, 2015·15 cites·8 claims
- 3193US8927397B2Diode structure and method for gate all around silicon nanowire technologiesIBM·Filed 2013·Granted Jan 6, 2015·14 cites·18 claims
- 3293US8802527B1Gate electrode optimized for low voltage operationIBM·Filed 2013·Granted Aug 12, 2014·14 cites·16 claims
- 3393US8659084B1Techniques for gate workfunction engineering to reduce short channel effects in planar CMOS devicesCHANG JOSEPHINE B·Filed 2012·Granted Feb 25, 2014·14 cites·14 claims
- 3493US8178400B2Replacement spacer for tunnel FETsCHANG JOSEPHINE B·Filed 2009·Granted May 15, 2012·21 cites·16 claims
- 3592US9997613B2Integrated etch stop for capped gate and method for manufacturing the sameIBM·Filed 2017·Granted Jun 12, 2018·6 cites·16 claims
- 3691US10367062B2Co-integration of silicon and silicon-germanium channels for nanosheet devicesIBM·Filed 2018·Granted Jul 30, 2019·4 cites·15 claims
- 3791US9496338B2Wire-last gate-all-around nanowire FETIBM·Filed 2015·Granted Nov 15, 2016·6 cites·15 claims
- 3891US8318568B2Tunnel field effect transistorDORIS BRUCE B·Filed 2010·Granted Nov 27, 2012·11 cites·8 claims
- 3990US9373638B1Complementary metal-oxide silicon having silicon and silicon germanium channelsIBM·Filed 2015·Granted Jun 21, 2016·5 cites·12 claims
- 4090US8816327B2Nanowire efusesCHANG JOSEPHINE B·Filed 2012·Granted Aug 26, 2014·10 cites·1 claims
- 4189US9548355B1Compound finFET device including oxidized III-V fin isolatorIBM·Filed 2015·Granted Jan 17, 2017·5 cites·5 claims
- 4289US8901655B2Diode structure for gate all around silicon nanowire technologiesIBM·Filed 2013·Granted Dec 2, 2014·9 cites·7 claims
- 4389US8872274B2Structure for self-aligned silicide contacts to an upside-down FET by epitaxial source and drainIBM·Filed 2014·Granted Oct 28, 2014·8 cites·4 claims
- 4489US8796742B1Non-replacement gate nanomesh field effect transistor with epitixially grown source and drainIBM·Filed 2013·Granted Aug 5, 2014·9 cites·20 claims
- 4589US8216907B2Process to fabricate a metal high-K transistor having first and second silicon sidewalls for reduced parasitic capacitanceCHANG LELAND·Filed 2010·Granted Jul 10, 2012·8 cites·13 claims
- 4688US10026810B2Co-integration of silicon and silicon-germanium channels for nanosheet devicesIBM·Filed 2017·Granted Jul 17, 2018·3 cites·15 claims
- 4788US9922942B2Support for long channel length nanowire transistorsIBM·Filed 2016·Granted Mar 20, 2018·3 cites·20 claims
- 4888US8823064B2Asymmetric FET formed through use of variable pitch gate for use as logic device and test structureCHANG JOSEPHINE B·Filed 2012·Granted Sep 2, 2014·7 cites·20 claims
- 4988US8659006B1Techniques for metal gate work function engineering to enable multiple threshold voltage nanowire FET devicesCHANG JOSEPHINE B·Filed 2012·Granted Feb 25, 2014·9 cites·18 claims
- 5088US8143113B2Omega shaped nanowire tunnel field effect transistors fabricationBANGSARUNTIP SARUNYA·Filed 2009·Granted Mar 27, 2012·10 cites·20 claims
Showing the top 50 of 221 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →