Inventor · disambiguated record
Janusz Rajski
Also filed as: RAJSKI JANUSZ · RAJSKI JANUSZ E
131 granted patents·10 pending applications·3,987 citations·filing 1993–2021
99Inventor score
Top patents by PatentIndex Score
141 records- 0199US7913137B2On-chip comparison and response collection tools and techniquesMENTOR GRAPHICS CORP·Filed 2007·Granted Mar 22, 2011·60 cites·5 claims
- 0299US7818644B2Multi-stage test response compactorsRAJSKI JANUSZ·Filed 2007·Granted Oct 19, 2010·65 cites·60 claims
- 0399US6829740B2Method and apparatus for selectively compacting test responsesFiled 2003·Granted Dec 7, 2004·143 cites·23 claims
- 0499US6684358B1Decompressor/PRPG for applying pseudo-random and deterministic test patternsFiled 2000·Granted Jan 27, 2004·212 cites·41 claims
- 0599US6557129B1Method and apparatus for selectively compacting test responsesFiled 2000·Granted Apr 29, 2003·237 cites·68 claims
- 0699US6543020B2Test pattern compression for an integrated circuit test environmentFiled 2001·Granted Apr 1, 2003·143 cites·27 claims
- 0799US6327687B1Test pattern compression for an integrated circuit test environmentFiled 2000·Granted Dec 4, 2001·204 cites·30 claims
- 0898US7523372B2Phase shifter with reduced linear dependencyRAJSKI JANUSZ·Filed 2007·Granted Apr 21, 2009·42 cites·21 claims
- 0998US7509546B2Test pattern compression for an integrated circuit test environmentRAJSKI JANUSZ·Filed 2006·Granted Mar 24, 2009·47 cites·21 claims
- 1098US7506232B2Decompressor/PRPG for applying pseudo-random and deterministic test patternsRAJSKI JANUSZ·Filed 2006·Granted Mar 17, 2009·47 cites·12 claims
- 1198US7111209B2Test pattern compression for an integrated circuit test environmentRAJSKI JANUSZ·Filed 2003·Granted Sep 19, 2006·92 cites·19 claims
- 1298US7093175B2Decompressor/PRPG for applying pseudo-random and deterministic test patternsRAJSKI JANUSZ·Filed 2003·Granted Aug 15, 2006·102 cites·12 claims
- 1398US5991909AParallel decompressor and related methods and apparatusesMENTOR GRAPHICS CORP·Filed 1996·Granted Nov 23, 1999·246 cites·36 claims
- 1497US7797603B2Low power decompression of test cubesRAJSKI JANUSZ·Filed 2007·Granted Sep 14, 2010·59 cites·36 claims
- 1597US7653851B2Phase shifter with reduced linear dependencyRAJSKI JANUSZ·Filed 2009·Granted Jan 26, 2010·32 cites·18 claims
- 1697US7647540B2Decompressors for low power decompression of test patternsRAJSKI JANUSZ·Filed 2007·Granted Jan 12, 2010·41 cites·24 claims
- 1797US7512508B2Determining and analyzing integrated circuit yield and qualityRAJSKI JANUSZ·Filed 2005·Granted Mar 31, 2009·54 cites·57 claims
- 1897US6874109B1Phase shifter with reduced linear dependencyFiled 2000·Granted Mar 29, 2005·108 cites·47 claims
- 1996US10476740B1Data generation for streaming networks in circuitsMENTOR GRAPHICS CORP·Filed 2018·Granted Nov 12, 2019·16 cites·30 claims
- 2096US8418007B2On-chip comparison and response collection tools and techniquesMUKHERJEE NILANJAN·Filed 2011·Granted Apr 9, 2013·12 cites·12 claims
- 2196US7987442B2Fault dictionaries for integrated circuit yield and quality analysis methods and systemsMENTOR GRAPHICS CORP·Filed 2005·Granted Jul 26, 2011·38 cites·42 claims
- 2296US7925465B2Low power scan testing techniques and apparatusMENTOR GRAPHICS CORP·Filed 2008·Granted Apr 12, 2011·37 cites·48 claims
- 2396US7805649B2Method and apparatus for selectively compacting test responsesMENTOR GRAPHICS CORP·Filed 2009·Granted Sep 28, 2010·26 cites·21 claims
- 2496US7500163B2Method and apparatus for selectively compacting test responsesRAJSKI JANUSZ·Filed 2004·Granted Mar 3, 2009·60 cites·22 claims
- 2596US7260591B2Method for synthesizing linear finite state machinesRAJSKI JANUSZ·Filed 2004·Granted Aug 21, 2007·53 cites·20 claims
- 2696US6353842B1Method for synthesizing linear finite state machinesFiled 2000·Granted Mar 5, 2002·98 cites·35 claims
- 2796US5991898AArithmetic built-in self test of multiple scan-based integrated circuitsMENTOR GRAPHICS CORP·Filed 1997·Granted Nov 23, 1999·229 cites·47 claims
- 2895US9778316B2Multi-stage test response compactorsMENTOR GRAPHICS CORP·Filed 2016·Granted Oct 3, 2017·5 cites·13 claims
- 2995US8280688B2Compactor independent direct diagnosis of test hardwareHUANG YU·Filed 2010·Granted Oct 2, 2012·16 cites·20 claims
- 3095US7729884B2Compactor independent direct diagnosis of test hardwareHUANG YU·Filed 2005·Granted Jun 1, 2010·48 cites·34 claims
- 3195US7437640B2Fault diagnosis of compressed test responses having one or more unknown statesRAJSKI JANUSZ·Filed 2005·Granted Oct 14, 2008·37 cites·24 claims
- 3295US7370254B2Compressing test responses using a compactorRAJSKI JANUSZ·Filed 2004·Granted May 6, 2008·82 cites·43 claims
- 3395US6708192B2Method for synthesizing linear finite state machinesFiled 2003·Granted Mar 16, 2004·78 cites·19 claims
- 3494US10473721B1Data streaming for testing identical circuit blocksMENTOR GRAPHICS CORP·Filed 2018·Granted Nov 12, 2019·10 cites·28 claims
- 3594US8166359B2Selective per-cycle masking of scan chains for system level testRAJSKI JANUSZ·Filed 2008·Granted Apr 24, 2012·19 cites·17 claims
- 3694US7900104B2Test pattern compression for an integrated circuit test environmentMENTOR GRAPHICS CORP·Filed 2009·Granted Mar 1, 2011·17 cites·21 claims
- 3794US7302624B2Adaptive fault diagnosis of compressed test responsesRAJSKI JANUSZ·Filed 2005·Granted Nov 27, 2007·45 cites·28 claims
- 3894US7263641B2Phase shifter with reduced linear dependencyRAJSKI JANUSZ·Filed 2004·Granted Aug 28, 2007·51 cites·19 claims
- 3994US6966021B2Method and apparatus for at-speed testing of digital circuitsRAJSKI JANUSZ·Filed 2002·Granted Nov 15, 2005·84 cites·23 claims
- 4094US6539409B2Method for synthesizing linear finite state machinesFiled 2001·Granted Mar 25, 2003·75 cites·18 claims
- 4193US8726112B2Scan test application through high-speed serial input/outputsRAJSKI JANUSZ·Filed 2009·Granted May 13, 2014·28 cites·44 claims
- 4293US8290738B2Low power scan testing techniques and apparatusLIN XIJIANG·Filed 2011·Granted Oct 16, 2012·12 cites·31 claims
- 4393US7890827B2Compressing test responses using a compactorMENTOR GRAPHICS CORP·Filed 2010·Granted Feb 15, 2011·11 cites·15 claims
- 4493US7555689B2Generating responses to patterns stimulating an electronic circuit with timing exception pathsGOSWAMI DHIRAJ·Filed 2006·Granted Jun 30, 2009·27 cites·40 claims
- 4593US7509550B2Fault diagnosis of compressed test responsesRAJSKI JANUSZ·Filed 2005·Granted Mar 24, 2009·36 cites·32 claims
- 4692US8914694B2On-chip comparison and response collection tools and techniquesMENTOR GRAPHICS CORP·Filed 2013·Granted Dec 16, 2014·6 cites·10 claims
- 4792US8108743B2Method and apparatus for selectively compacting test responsesRAJSKI JANUSZ·Filed 2010·Granted Jan 31, 2012·7 cites·17 claims
- 4892US8046653B2Low power decompression of test cubesMENTOR GRAPHICS CORP·Filed 2010·Granted Oct 25, 2011·10 cites·17 claims
- 4992US7865794B2Decompressor/PRPG for applying pseudo-random and deterministic test patternsMENTOR GRAPHICS CORP·Filed 2009·Granted Jan 4, 2011·14 cites·18 claims
- 5092US7865792B2Test generation methods for reducing power dissipation and supply currentsMENTOR GRAPHICS CORP·Filed 2010·Granted Jan 4, 2011·10 cites·31 claims
Showing the top 50 of 141 patent records by PatentIndex Score.
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