Inventor · disambiguated record
Jeffrey R. Wilcox
Also filed as: WILCOX JEFFREY · WILCOX JEFFREY R
51 granted patents·3 pending applications·847 citations·filing 1999–2021
98Inventor score
Top patents by PatentIndex Score
54 records- 0197US6799241B2Method for dynamically adjusting a memory page closing policyINTEL CORP·Filed 2002·Granted Sep 28, 2004·162 cites·20 claims
- 0296US11138346B2Unified addressable memoryAPPLE INC·Filed 2020·Granted Oct 5, 2021·4 cites·20 claims
- 0393US8046488B2Dynamically modulating link widthINTEL CORP·Filed 2004·Granted Oct 25, 2011·69 cites·34 claims
- 0493US6820169B2Memory control with lookahead power managementINTEL CORP·Filed 2001·Granted Nov 16, 2004·93 cites·20 claims
- 0592US7313712B2Link power saving stateINTEL CORP·Filed 2004·Granted Dec 25, 2007·71 cites·21 claims
- 0691US6944084B2Memory system that measures power consumptionINTEL CORP·Filed 2002·Granted Sep 13, 2005·65 cites·27 claims
- 0790US10671762B2Unified addressable memoryAPPLE INC·Filed 2016·Granted Jun 2, 2020·6 cites·19 claims
- 0889US7610500B2Link power saving stateINTEL CORP·Filed 2007·Granted Oct 27, 2009·17 cites·9 claims
- 0988US6510099B1Memory control with dynamic driver disablingINTEL CORP·Filed 2001·Granted Jan 21, 2003·53 cites·28 claims
- 1087US10747908B2Secure circuit control to disable circuitryAPPLE INC·Filed 2018·Granted Aug 18, 2020·5 cites·16 claims
- 1185US9600413B2Common platform for one-level memory architecture and two-level memory architectureRAY JOYDEEP·Filed 2013·Granted Mar 21, 2017·10 cites·25 claims
- 1285US8831666B2Link power savings with state retentionCHERUKURI NAVEEN·Filed 2009·Granted Sep 9, 2014·11 cites·21 claims
- 1385US6633178B2Apparatus and method for power efficient line driverINTEL CORP·Filed 2001·Granted Oct 14, 2003·45 cites·30 claims
- 1481US10228861B2Common platform for one-level memory architecture and two-level memory architectureINTEL CORP·Filed 2017·Granted Mar 12, 2019·2 cites·20 claims
- 1581US10042701B2Storing address of spare in failed memory locationAPPLE INC·Filed 2016·Granted Aug 7, 2018·2 cites·19 claims
- 1681US6330639B1Method and apparatus for dynamically changing the sizes of pools that control the power consumption levels of memory devicesINTEL CORP·Filed 1999·Granted Dec 11, 2001·100 cites·49 claims
- 1780US10175744B2Link power savings with state retentionINTEL CORP·Filed 2017·Granted Jan 8, 2019·2 cites·20 claims
- 1878US8707072B2Interface frequency modulation to allow non-terminated operation and power reductionWILCOX JEFFREY R·Filed 2011·Granted Apr 22, 2014·3 cites·22 claims
- 1978US7886177B2Method and apparatus of collecting timer ticksINTEL CORP·Filed 2006·Granted Feb 8, 2011·8 cites·12 claims
- 2076US10712809B2Link power savings with state retentionINTEL CORP·Filed 2019·Granted Jul 14, 2020·1 cites·20 claims
- 2174US9588575B2Link power savings with state retentionINTEL CORP·Filed 2014·Granted Mar 7, 2017·2 cites·20 claims
- 2274US7315952B2Power state coordination between devices sharing power-managed resourcesINTEL CORP·Filed 2004·Granted Jan 1, 2008·19 cites·29 claims
- 2374US7000065B2Method and apparatus for reducing power consumption in a memory bus interface by selectively disabling and enabling sense amplifiersINTEL CORP·Filed 2002·Granted Feb 14, 2006·16 cites·10 claims
- 2472US11263326B2Method and apparatus for secure system bootAPPLE INC·Filed 2017·Granted Mar 1, 2022·2 cites·20 claims
- 2572US10417429B2Method and apparatus for boot variable protectionAPPLE INC·Filed 2017·Granted Sep 17, 2019·2 cites·13 claims
- 2671US11714924B2Unified addressable memoryAPPLE INC·Filed 2021·Granted Aug 1, 2023·0 cites·20 claims
- 2771US9195292B2Controlling reduced power states using platform latency toleranceINTEL CORP·Filed 2013·Granted Nov 24, 2015·2 cites·20 claims
- 2870US7007187B1Method and apparatus for an integrated circuit having flexible-ratio frequency domain cross-oversINTEL CORP·Filed 2000·Granted Feb 28, 2006·13 cites·6 claims
- 2968US7272741B2Hardware coordination of power management activitiesINTEL CORP·Filed 2004·Granted Sep 18, 2007·13 cites·31 claims
- 3066US7360103B2P-state feedback to operating system with hardware coordinationINTEL CORP·Filed 2004·Granted Apr 15, 2008·14 cites·48 claims
- 3165US9535829B2Non-volatile memory interfaceINTEL CORP·Filed 2013·Granted Jan 3, 2017·1 cites·20 claims
- 3264US10318377B2Storing address of spare in failed memory locationAPPLE INC·Filed 2018·Granted Jun 11, 2019·1 cites·20 claims
- 3363US11221762B2Common platform for one-level memory architecture and two-level memory architectureINTEL CORP·Filed 2019·Granted Jan 11, 2022·0 cites·19 claims
- 3462US7945793B2Interface frequency modulation to allow non-terminated operation and power reductionINTEL CORP·Filed 2006·Granted May 17, 2011·2 cites·26 claims
- 3562US6970010B2Apparatus and method for power efficient line driverINTEL CORP·Filed 2003·Granted Nov 29, 2005·7 cites·25 claims
- 3661US11216054B2Techniques for adjusting computing device sleep states using onboard sensors and learned user behaviorsAPPLE INC·Filed 2019·Granted Jan 4, 2022·0 cites·20 claims
- 3761US6842831B2Low latency buffer control system and methodINTEL CORP·Filed 2002·Granted Jan 11, 2005·9 cites·15 claims
- 3859US9794349B2Dynamically modulating link widthINTEL CORP·Filed 2014·Granted Oct 17, 2017·0 cites·16 claims
- 3958US8176240B2Method and apparatus for reducing power consumption in a memory bus interface by selectively disabling and enabling sense amplifiersWILCOX JEFFREY R·Filed 2006·Granted May 8, 2012·1 cites·18 claims
- 4056US9910771B2Non-volatile memory interfaceINTEL CORP·Filed 2017·Granted Mar 6, 2018·0 cites·27 claims
- 4155US10423212B2Techniques for adjusting computing device sleep states using onboard sensors and learned user behaviorsAPPLE INC·Filed 2017·Granted Sep 24, 2019·0 cites·20 claims
- 4254US10929222B2Storing address of spare in failed memory locationAPPLE INC·Filed 2019·Granted Feb 23, 2021·0 cites·20 claims
- 4353US9541983B2Controlling reduced power states using platform latency toleranceINTEL CORP·Filed 2015·Granted Jan 10, 2017·0 cites·20 claims
- 4453US6687172B2Individual memory page activity timing method and systemINTEL CORP·Filed 2002·Granted Feb 3, 2004·7 cites·29 claims
- 4551US10102157B2Method and apparatus for reducing power consumption in a memory bus interface by selectively disabling and enabling sense amplifiersWILCOX JEFFREY R·Filed 2012·Granted Oct 16, 2018·0 cites·22 claims
- 4651US7257728B2Method and apparatus for an integrated circuit having flexible-ratio frequency domain cross-oversINTEL CORP·Filed 2004·Granted Aug 14, 2007·1 cites·12 claims
- 4749US8914541B2Dynamically modulating link widthCHERUKURI NAVEEN·Filed 2011·Granted Dec 16, 2014·0 cites·13 claims
- 4849US2005086420A1Low latency buffer control system and methodFiled 2004·Application pending·0 cites
- 4948US11176280B2Secure circuit control to disable circuitryAPPLE INC·Filed 2017·Granted Nov 16, 2021·0 cites·21 claims
- 5047US6529442B1Memory controller with AC power reduction through non-return-to-idle of address and control signalsINTEL CORP·Filed 2002·Granted Mar 4, 2003·5 cites·28 claims
Showing the top 50 of 54 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →