Inventor · disambiguated record
Joerg Hohage
Also filed as: HOHAGE JOERG
31 granted patents·4 pending applications·693 citations·filing 2000–2012
96Inventor score
Top patents by PatentIndex Score
35 records- 0197US7550396B2Method for reducing resist poisoning during patterning of silicon nitride layers in a semiconductor deviceADVANCED MICRO DEVICES INC·Filed 2007·Granted Jun 23, 2009·507 cites·22 claims
- 0293US7396718B2Technique for creating different mechanical strain in different channel regions by forming an etch stop layer stack having differently modified intrinsic stressADVANCED MICRO DEVICES INC·Filed 2005·Granted Jul 8, 2008·29 cites·9 claims
- 0388US7906383B2Stress transfer in an interlayer dielectric by providing a stressed dielectric layer above a stress-neutral dielectric material in a semiconductor deviceADVANCED MICRO DEVICES INC·Filed 2008·Granted Mar 15, 2011·16 cites·28 claims
- 0486US7867917B2Etch stop layer for a metallization layer with enhanced adhesion, etch selectivity and hermeticityADVANCED MICRO DEVICES INC·Filed 2006·Granted Jan 11, 2011·11 cites·16 claims
- 0581US8053354B2Reduced wafer warpage in semiconductors by stress engineering in the metallization systemGLOBALFOUNDRIES INC·Filed 2009·Granted Nov 8, 2011·7 cites·16 claims
- 0680US7381602B2Method of forming a field effect transistor comprising a stressed channel regionADVANCED MICRO DEVICES INC·Filed 2005·Granted Jun 3, 2008·9 cites·39 claims
- 0776US6368948B1Method of forming capped copper interconnects with reduced hillocksADVANCED MICRO DEVICES INC·Filed 2000·Granted Apr 9, 2002·25 cites·17 claims
- 0874US7678699B2Method of forming an insulating capping layer for a copper metallization layer by using a silane reactionADVANCED MICRO DEVICES INC·Filed 2006·Granted Mar 16, 2010·6 cites·19 claims
- 0973US8338284B2Stress engineering in a contact level of semiconductor devices by stressed conductive layers and an isolation spacerFROHBERG KAI·Filed 2010·Granted Dec 25, 2012·4 cites·15 claims
- 1073US6893956B2Barrier layer for a copper metallization layer including a low-k dielectricADVANCED MICRO DEVICES INC·Filed 2003·Granted May 17, 2005·20 cites·41 claims
- 1170US7994072B2Stress transfer by sequentially providing a highly stressed etch stop material and an interlayer dielectric in a contact layer stack of a semiconductor deviceADVANCED MICRO DEVICES INC·Filed 2008·Granted Aug 9, 2011·5 cites·23 claims
- 1270US6596631B1Method of forming copper interconnect capping layers with improved interface and adhesionADVANCED MICRO DEVICES INC·Filed 2000·Granted Jul 22, 2003·17 cites·19 claims
- 1366US7938973B2Arc layer having a reduced flaking tendency and a method of manufacturing the sameADVANCED MICRO DEVICES INC·Filed 2007·Granted May 10, 2011·2 cites·20 claims
- 1466US7476626B2Etch stop layer for a metallization layer with enhanced etch selectivity and hermeticityADVANCED MICRO DEVICES INC·Filed 2006·Granted Jan 13, 2009·2 cites·14 claims
- 1566US7341903B2Method of forming a field effect transistor having a stressed channel regionADVANCED MICRO DEVICES INC·Filed 2005·Granted Mar 11, 2008·3 cites·14 claims
- 1665US8034726B2Interlayer dielectric material in a semiconductor device comprising a doublet structure of stressed materialsADVANCED MICRO DEVICES INC·Filed 2008·Granted Oct 11, 2011·3 cites·16 claims
- 1764US7022602B2Nitrogen-enriched low-k barrier layer for a copper metallization layerADVANCED MICRO DEVICES INC·Filed 2003·Granted Apr 4, 2006·11 cites·17 claims
- 1863US8546274B2Interlayer dielectric material in a semiconductor device comprising stressed layers with an intermediate buffer materialHOHAGE JOERG·Filed 2010·Granted Oct 1, 2013·2 cites·14 claims
- 1963US7491638B2Method of forming an insulating capping layer for a copper metallization layerADVANCED MICRO DEVICES INC·Filed 2006·Granted Feb 17, 2009·1 cites·17 claims
- 2062US7875561B2Interlayer dielectric material in a semiconductor device comprising stressed layers with an intermediate buffer materialADVANCED MICRO DEVICES INC·Filed 2008·Granted Jan 25, 2011·2 cites·25 claims
- 2161US7994059B2Enhanced stress transfer in an interlayer dielectric by using an additional stress layer above a dual stress liner in a semiconductor deviceADVANCED MICRO DEVICES INC·Filed 2007·Granted Aug 9, 2011·2 cites·9 claims
- 2253US7858531B2Method of forming a semiconductor structure comprising a field effect transistor having a stressed channel regionADVANCED MICRO DEVICES INC·Filed 2008·Granted Dec 28, 2010·1 cites·14 claims
- 2352US6569768B2Surface treatment and capping layer process for producing a copper interface in a semiconductor deviceADVANCED MICRO DEVICES INC·Filed 2001·Granted May 27, 2003·3 cites·17 claims
- 2449US8153524B2Providing superior electromigration performance and reducing deterioration of sensitive low-k dielectrics in metallization systems of semiconductor devicesAUBEL OLIVER·Filed 2010·Granted Apr 10, 2012·1 cites·20 claims
- 2546US8211795B2Method of forming a dielectric cap layer for a copper metallization by using a hydrogen based thermal-chemical treatmentHOHAGE JOERG·Filed 2008·Granted Jul 3, 2012·0 cites·22 claims
- 2644US2007254492A1Technique for forming a silicon nitride layer having high intrinsic compressive stressBAER STEFFEN·Filed 2006·Application pending·0 cites
- 2743US7608912B2Technique for creating different mechanical strain in different CPU regions by forming an etch stop layer having differently modified intrinsic stressADVANCED MICRO DEVICES INC·Filed 2006·Granted Oct 27, 2009·0 cites·5 claims
- 2842US8841140B2Technique for forming a passivation layer without a terminal metalLETZ TOBIAS·Filed 2007·Granted Sep 23, 2014·0 cites·15 claims
- 2941US8828888B2Protection of reactive metal surfaces of semiconductor devices during shipping by providing an additional protection layerLEHR MATTHIAS·Filed 2012·Granted Sep 9, 2014·0 cites·6 claims
- 3041US7030044B2Method of forming a cap layer having anti-reflective characteristics on top of a low-k dielectricADVANCED MICRO DEVICES INC·Filed 2003·Granted Apr 18, 2006·4 cites·11 claims
- 3141US2008203487A1Field effect transistor having an interlayer dielectric material having increased intrinsic stressHOHAGE JOERG·Filed 2007·Application pending·0 cites
- 3241US2003200984A1Highly efficient remote clean process for process chambers in deposition toolsFiled 2002·Application pending·0 cites
- 3339US8759232B2Compressive stress transfer in an interlayer dielectric of a semiconductor device by providing a bi-layer of superior adhesion and internal stressHOHAGE JOERG·Filed 2012·Granted Jun 24, 2014·0 cites·19 claims
- 3438US8450172B2Non-insulating stressed material layers in a contact level of semiconductor devicesRICHTER RALF·Filed 2010·Granted May 28, 2013·0 cites·18 claims
- 3536US2003072695A1Method of removing oxidized portions at an interface of a metal surface and capping layer in a semiconductor metallization layerFiled 2002·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →