Inventor · disambiguated record
Joerg Wohlfahrt
Also filed as: WOHLFAHRT JOERG · WOHLFAHRT JOERG W · WOHLFAHRT JOERG WILFRIED
18 granted patents·3 pending applications·168 citations·filing 2000–2003
94Inventor score
Files withINFINEON TECHNOLOGIES AG12INFINEON TECHNOLOGIES RICHMOND3INFINEON TECHNOLOGIES CORP1RATHEI DIETER1TOSHIBA KK1
Top patents by PatentIndex Score
21 records- 0172US6717431B2Method for semiconductor yield loss calculationINFINEON TECHNOLOGIES RICHMOND·Filed 2002·Granted Apr 6, 2004·20 cites·20 claims
- 0268US7187602B2Reducing memory failures in integrated circuitsINFINEON TECHNOLOGIES AG·Filed 2003·Granted Mar 6, 2007·16 cites·22 claims
- 0368US6482716B1Uniform recess depth of recessed resist layers in trench structureINFINEON TECHNOLOGIES CORP·Filed 2000·Granted Nov 19, 2002·16 cites·10 claims
- 0465US6800890B1Memory architecture with series grouped by cellsINFINEON TECHNOLOGIES AG·Filed 2002·Granted Oct 5, 2004·14 cites·14 claims
- 0564US6639824B1Memory architectureINFINEON TECHNOLOGIES AG·Filed 2002·Granted Oct 28, 2003·13 cites·28 claims
- 0663US6720598B1Series memory architectureINFINEON TECHNOLOGIES AG·Filed 2002·Granted Apr 13, 2004·9 cites·10 claims
- 0762US6826099B22T2C signal margin test mode using a defined charge and discharge of BL and /BLINFINEON TECHNOLOGIES AG·Filed 2002·Granted Nov 30, 2004·12 cites·11 claims
- 0861US6963813B1Method and apparatus for fast automated failure classification for semiconductor wafersRATHEI DIETER·Filed 2000·Granted Nov 8, 2005·9 cites·15 claims
- 0961US6731529B2Variable capacitances for memory cells within a cell groupINFINEON TECHNOLOGIES AG·Filed 2002·Granted May 4, 2004·7 cites·15 claims
- 1061US6553521B1Method for efficient analysis semiconductor failuresINFINEON TECHNOLOGIES RICHMOND·Filed 2000·Granted Apr 22, 2003·15 cites·17 claims
- 1159US6999887B2Memory cell signal window testing apparatusINFINEON TECHNOLOGIES AG·Filed 2003·Granted Feb 14, 2006·10 cites·6 claims
- 1251US6731554B12T2C signal margin test mode using resistive elementINFINEON TECHNOLOGIES AG·Filed 2002·Granted May 4, 2004·7 cites·16 claims
- 1346US6707699B1Historical information storage for integrated circuitsINFINEON TECHNOLOGIES AG·Filed 2002·Granted Mar 16, 2004·4 cites·19 claims
- 1445US6856560B2Redundancy in series grouped memory architectureINFINEON TECHNOLOGIES AG·Filed 2002·Granted Feb 15, 2005·4 cites·25 claims
- 1544US6885597B2Sensing test circuitTOSHIBA KK·Filed 2002·Granted Apr 26, 2005·4 cites·39 claims
- 1642US6807084B1FeRAM memory deviceINFINEON TECHNOLOGIES AG·Filed 2003·Granted Oct 19, 2004·3 cites·9 claims
- 1740US6903959B2Sensing of memory integrated circuitsINFINEON TECHNOLOGIES AG·Filed 2002·Granted Jun 7, 2005·2 cites·22 claims
- 1837US7003432B2Method of and system for analyzing cells of a memory deviceINFINEON TECHNOLOGIES RICHMOND·Filed 2003·Granted Feb 21, 2006·3 cites·19 claims
- 1932US2005063212A1Reference circuit implemented to reduce the degradation of reference capacitors providing reference voltages for 1T1C FeRAM devicesFiled 2003·Application pending·0 cites
- 2032US2004095799A12T2C signal margin test mode using different pre-charge levels for BL and/BLFiled 2002·Application pending·0 cites
- 2132US2004095798A1Ferroelectric memory architectureFiled 2002·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →