Inventor · disambiguated record
Kenneth A. Lauricella
Also filed as: LAURICELLA KENNETH A · LAURICELLA KENNETH ANTHONY
22 granted patents·4 pending applications·292 citations·filing 1990–2017
95Inventor score
Top patents by PatentIndex Score
26 records- 0189US5465374AProcessor for processing data string by byte-by-byteIBM·Filed 1993·Granted Nov 7, 1995·131 cites·6 claims
- 0285US7480888B1Design structure for facilitating engineering changes in integrated circuitsIBM·Filed 2008·Granted Jan 20, 2009·14 cites·3 claims
- 0381US9740629B2Tracking memory accesses when invalidating effective address to real address translationsIBM·Filed 2014·Granted Aug 22, 2017·5 cites·9 claims
- 0480US9251108B2Managing access to shared buffer resourcesIBM·Filed 2012·Granted Feb 2, 2016·5 cites·19 claims
- 0578US8938587B2Data recovery for coherent attached processor proxyIBM·Filed 2013·Granted Jan 20, 2015·4 cites·18 claims
- 0669US7787577B2Asynchronous interface methods and apparatusIBM·Filed 2008·Granted Aug 31, 2010·4 cites·10 claims
- 0768US8060845B2Minimizing impact of design changes for integrated circuit designsHERZL ROBERT D·Filed 2008·Granted Nov 15, 2011·4 cites·6 claims
- 0867US9727483B2Tracking memory accesses when invalidating effective address to real address translationsIBM·Filed 2015·Granted Aug 8, 2017·1 cites·7 claims
- 0967US8141028B2Structure for identifying and implementing flexible logic block logic for easy engineering changesHERZL ROBERT D·Filed 2008·Granted Mar 20, 2012·4 cites·2 claims
- 1065US9229868B2Data recovery for coherent attached processor proxyIBM·Filed 2013·Granted Jan 5, 2016·1 cites·7 claims
- 1161US8667223B2Shadow registers for least recently used data in cacheCHADWICK JR THOMAS B·Filed 2011·Granted Mar 4, 2014·2 cites·12 claims
- 1259US8341588B2Semiconductor layer forming method and structureHERZL ROBERT D·Filed 2010·Granted Dec 25, 2012·1 cites·19 claims
- 1359US7319729B2Asynchronous interface methods and apparatusIBM·Filed 2003·Granted Jan 15, 2008·6 cites·19 claims
- 1459US5619715AHardware implementation of string instructionsIBM·Filed 1995·Granted Apr 8, 1997·33 cites·5 claims
- 1558US10380048B2Suspend and resume in a time shared coprocessorIBM·Filed 2017·Granted Aug 13, 2019·0 cites·21 claims
- 1658US8181148B2Method for identifying and implementing flexible logic block logic for easy engineering changesHERZL ROBERT D·Filed 2008·Granted May 15, 2012·1 cites·17 claims
- 1758US5608887AMethod of processing data stringsIBM·Filed 1995·Granted Mar 4, 1997·29 cites·3 claims
- 1854US9852095B2Suspend and resume in a time shared coprocessorIBM·Filed 2015·Granted Dec 26, 2017·0 cites·8 claims
- 1953US9921986B2Suspend and resume in a time shared coprocessorIBM·Filed 2015·Granted Mar 20, 2018·0 cites·10 claims
- 2049US5269009AProcessor system with improved memory transfer meansIBM·Filed 1990·Granted Dec 7, 1993·25 cites·4 claims
- 2148US6157981AReal time invariant behavior cacheIBM·Filed 1998·Granted Dec 5, 2000·22 cites·11 claims
- 2248US2012167022A1Method and device for identifying and implementing flexible logic block logic for easy engineering changesHERZL ROBERT D·Filed 2012·Application pending·0 cites
- 2347US9286129B2Termination of requests in a distributed coprocessor systemIBM·Filed 2013·Granted Mar 15, 2016·0 cites·13 claims
- 2446US2009045839A1Asic logic library of flexible logic blocks and method to enable engineering changeIBM·Filed 2007·Application pending·0 cites
- 2545US2009045836A1Asic logic library of flexible logic blocks and method to enable engineering changeHERZL ROBERT D·Filed 2007·Application pending·0 cites
- 2641US2013304990A1Dynamic Control of Cache Injection Based on Write Data TypeBASS BRIAN MITCHELL·Filed 2012·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →