Inventor · disambiguated record
King-Jien Chui
Also filed as: CHUI KING-JIEN
8 granted patents·2 pending applications·41 citations·filing 2004–2016
84Inventor score
Files withUNISANTIS ELECT SINGAPORE PTE3CHARTERED SEMICONDUCTOR MFG2GLOBALFOUNDRIES SG PTE LTD2MASUOKA FUJIO2CHARTERED SEMICONDUCTOR MFG L1
Top patents by PatentIndex Score
10 records- 0189US9153697B2Surrounding gate transistor (SGT) structureMASUOKA FUJIO·Filed 2011·Granted Oct 6, 2015·9 cites·11 claims
- 0289US8486785B2Surround gate CMOS semiconductor deviceMASUOKA FUJIO·Filed 2011·Granted Jul 16, 2013·12 cites·10 claims
- 0376US8609494B2Surround gate CMOS semiconductor deviceUNISANTIS ELECT SINGAPORE PTE·Filed 2013·Granted Dec 17, 2013·4 cites·2 claims
- 0459US7892905B2Formation of strained Si channel and Si1-xGex source/drain structures using laser annealingGLOBALFOUNDRIES SG PTE LTD·Filed 2005·Granted Feb 22, 2011·2 cites·40 claims
- 0555US7101743B2Low cost source drain elevation through poly amorphizing implant technologyCHARTERED SEMICONDUCTOR MFG L·Filed 2004·Granted Sep 5, 2006·8 cites·13 claims
- 0651US2016308013A1Semiconductor device and production methodUNISANTIS ELECT SINGAPORE PTE·Filed 2016·Application pending·0 cites
- 0749US7238581B2Method of manufacturing a semiconductor device with a strained channelCHARTERED SEMICONDUCTOR MFG·Filed 2004·Granted Jul 3, 2007·5 cites·20 claims
- 0849US2015357428A1Surrounding gate transistor (sgt) structureUNISANTIS ELECT SINGAPORE PTE·Filed 2015·Application pending·0 cites
- 0944US7888752B2Structure and method to form source and drain regions over doped depletion regionsGLOBALFOUNDRIES SG PTE LTD·Filed 2007·Granted Feb 15, 2011·0 cites·18 claims
- 1037US7202133B2Structure and method to form source and drain regions over doped depletion regionsCHARTERED SEMICONDUCTOR MFG·Filed 2004·Granted Apr 10, 2007·1 cites·27 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →