Surrounding gate transistor (sgt) structure

Abstract

The semiconductor device according to the present invention is an nMOS SGT and is composed of a first n+ type silicon layer, a first gate electrode containing metal and a second n+ type silicon layer arranged on the surface of a first columnar silicon layer positioned vertically on a first planar silicon layer. Furthermore, a first insulating film is positioned between the first gate electrode and the first planar silicon layer, and a second insulating film is positioned on the top surface of the first gate electrode. In addition, the first gate electrode containing metal is surrounded by the first n+ type silicon layer, the second n+ type silicon layer, the first insulating film and the second insulating film.

1 . A semiconductor device comprising:
 a first planar layer comprising a first planar semiconductor layer, a second planar semiconductor layer, and a planar insulating layer separating the first and second planar semiconductor layers;   a first columnar semiconductor layer on the first planar semiconductor layer;   a first gate insulating film surrounding the first columnar semiconductor layer;   a first gate electrode surrounding the first gate insulating film;   a first insulating film overlying the planar insulating layer and between the first gate electrode and the first planar semiconductor layer, the first insulating film comprising an insulating material different from the first gate insulating film.   
     
     
         2 . A semiconductor device comprising a first transistor and a second transistor, and a first planar layer comprising a first planar semiconductor layer, a second planar semiconductor layer, and a planar insulating layer separating the first and second planar semiconductor layers, wherein, the first transistor comprises:
 the first planar semiconductor layer;   a first columnar semiconductor layer on the first planar semiconductor layer;   a first gate insulating film surrounding the first columnar semiconductor layer;   a first gate electrode surrounding the first gate insulating film;   a first insulating film overlying the planar insulating layer and between the first gate electrode and the first planar semiconductor layer, the first insulating film comprising an insulating material different from the first gate insulating film; and   
       wherein the second transistor comprises:
 the second planar semiconductor layer; 
 a second columnar semiconductor layer on the second planar semiconductor layer; 
 a second gate insulating film surrounding the second columnar semiconductor layer; 
 a second gate electrode surrounding the second gate insulating film; 
 a fourth insulating film overlying the planar insulating layer and between the second gate electrode and the second planar semiconductor layer, the fourth insulating film comprising an insulating material different from the second gate insulating film.