Semiconductor device and production method

Abstract

A semiconductor device production method includes preparing a first structure having a first planar semiconductor layer, and a first columnar semiconductor layer on the first planar semiconductor layer. A first high concentration semiconductor layer is formed in a lower region of the first columnar semiconductor layer and in a region of the first planar semiconductor layer below the first columnar semiconductor layer. An insulating layer, a metal film, and a semiconductor film are sequentially formed on the first structure, and the semiconductor film, the metal film, and the insulating layer are sequentially etched with each leaving a sidewall shape on the sidewall on the first columnar semiconductor layer following etching. Another semiconductor film is then formed on the sidewall shape after etching the insulating film.

1 .- 2 . (canceled) 
     
     
         3 . A semiconductor device production method for producing a semiconductor device, the device comprising:
 a first planar semiconductor layer;   a first columnar semiconductor layer on the first planar semiconductor layer;   a first high concentration semiconductor layer on the first planar semiconductor layer and the lower region of the first columnar semiconductor layer;   a second high concentration semiconductor layer of the same conductive type as the first high concentration semiconductor layer, on the upper region of the first columnar semiconductor layer;   a first gate insulating film on the sidewall of the first columnar semiconductor layer between the first high concentration semiconductor layer and the second high concentration semiconductor layer, so as to surround the first columnar semiconductor layer;   a first metal film on the first gate insulating film so as to surround the first gate insulating film;   a first semiconductor film on the first metal film so as to surround the first metal film;   a first gate electrode composed of the first metal film and the first semiconductor film;   a first insulating film formed between the first gate electrode and the first planar semiconductor layer;   a second insulating film in sidewall shape contacting the upper sidewall of the first columnar semiconductor layer and the top surface of the first gate electrode so as to surround the upper region of the first columnar semiconductor layer;   a third insulating film in a sidewall shape contacting the sidewall of the first insulating film and the first gate electrode so as to surround the first gate electrode and the first insulating film;   a first contact above the first columnar semiconductor layer;   a second contact above the first planar semiconductor layer; and   a third contact above the first gate electrode;   wherein the first gate insulating film and the first metal film are covered by the first columnar semiconductor layer, the first semiconductor film, the first insulating film and the second insulating film;   the method comprising: preparing a first structure having:
 a first planar semiconductor layer;
 a first columnar semiconductor layer formed on the first planar semiconductor layer and a hard mask formed on the top surface of the first columnar semiconductor; 
 a first high concentration semiconductor layer formed in a lower region of the first columnar semiconductor layer and in a region of the first planar semiconductor layer below the first columnar semiconductor layer; 
 
   forming a first insulating film on the first planar semiconductor layer;   forming a seventh insulating film, a third metal film and a third semiconductor film, in that order, on the first structure;   etching the third semiconductor film and leaving a sidewall shape on the sidewall on the first columnar semiconductor layer;   etching the third metal film and leaving a sidewall shape on the sidewall of the first columnar semiconductor layer;   etching the seventh insulating film and leaving a sidewall shape on the sidewall of the first columnar semiconductor layer; and   forming a fourth semiconductor film on the sidewall shape after etching the seventh insulating film.   
     
     
         4 . The semiconductor device production method according to  claim 3 , further comprising:
 planarizing the fourth semiconductor film and the third semiconductor film after forming the fourth semiconductor film and exposing the upper region of the first metal film;   forming a deposited first metal film and a deposited first gate insulating film for etching the third metal film and the seventh insulating film so that the upper sidewall of the first columnar semiconductor layer is exposed to form the first metal film and the first gate insulating film; and,   forming a first oxide film on the first metal film and the first gate insulating film.   
     
     
         5 . A semiconductor device production method for producing a semiconductor device, the device comprising:
 a first planar semiconductor layer;   a first columnar semiconductor layer on the first planar semiconductor layer;   a first high concentration semiconductor layer on the first planar semiconductor layer and the lower region of the first columnar semiconductor layer;   a second high concentration semiconductor layer of the same conductive type as the first high concentration semiconductor layer, on the upper region of the first columnar semiconductor layer;   a first gate insulating film on the sidewall of the first columnar semiconductor layer between the first high concentration semiconductor layer and the second high concentration semiconductor layer, so as to surround the first columnar semiconductor layer;   a first metal film on the first gate insulating film so as to surround the first gate insulating film;   a first semiconductor film on the first metal film so as to surround the first metal film;   a first gate electrode composed of the first metal film and the first semiconductor film;   a first insulating film formed between the first gate electrode and the first planar semiconductor layer;   a second insulating film in sidewall shape contacting the upper sidewall of the first columnar semiconductor layer and the top surface of the first gate electrode so as to surround the upper region of the first columnar semiconductor layer;   a third insulating film in a sidewall shape contacting the sidewall of the first insulating film and the first gate electrode so as to surround the first gate electrode and the first insulating film;   a first contact above the first columnar semiconductor layer;   a second contact above the first planar semiconductor layer; and   a third contact above the first gate electrode;   wherein the first gate insulating film and the first metal film are covered by the first columnar semiconductor layer, the first semiconductor film, the first insulating film and the second insulating film;   the method comprising:   preparing a second structure having:
 a first planar semiconductor layer; 
 a first columnar semiconductor layer formed on the first planar semiconductor layer; 
 a first high concentration semiconductor layer formed on the lower region of the first columnar semiconductor layer and on the region of the first planar semiconductor layer below the first columnar semiconductor layer; 
 a first gate insulating film formed on the sidewall in the middle region of the first columnar semiconductor layer so as to surround the first columnar semiconductor layer; 
 a first metal film formed on the first gate insulating film so as to surround the first gate insulating film; 
 a first semiconductor film formed on the first metal film so as to surround the first metal film; 
 a first gate electrode composed of the first metal film and the first semiconductor film; and 
 a first insulating film formed between the first gate electrode and the first planar semiconductor layer; and 
   forming a second high concentration semiconductor layer of the same conductive type as the first high concentration semiconductor layer on the upper region of the first columnar semiconductor layer on the second structure by injecting a dopant at an angle of 10 degrees to 60 degrees, with a line orthogonal to the substrate being 0 degrees.   
     
     
         6 . A semiconductor device production method for producing a semiconductor device, the device comprising:
 a first planar semiconductor layer;   a first columnar semiconductor layer on the first planar semiconductor layer;   a first high concentration semiconductor layer on the first planar semiconductor layer and the lower region of the first columnar semiconductor layer;   a second high concentration semiconductor layer of the same conductive type as the first high concentration semiconductor layer, on the upper region of the first columnar semiconductor layer;   a first gate insulating film on the sidewall of the first columnar semiconductor layer between the first high concentration semiconductor layer and the second high concentration semiconductor layer, so as to surround the first columnar semiconductor layer;   a first metal film on the first gate insulating film so as to surround the first gate insulating film;   a first semiconductor film on the first metal film so as to surround the first metal film;   a first gate electrode composed of the first metal film and the first semiconductor film;   a first insulating film formed between the first gate electrode and the first planar semiconductor layer;   a second insulating film in sidewall shape contacting the upper sidewall of the first columnar semiconductor layer and the top surface of the first gate electrode so as to surround the upper region of the first columnar semiconductor layer;   a third insulating film in a sidewall shape contacting the sidewall of the first insulating film and the first gate electrode so as to surround the first gate electrode and the first insulating film;   a first contact above the first columnar semiconductor layer;   a second contact above the first planar semiconductor layer; and   a third contact above the first gate electrode;   wherein the first gate insulating film and the first metal film are covered by the first columnar semiconductor layer, the first semiconductor film, the first insulating film and the second insulating film;   the method comprising:   preparing a third structure having:
 a first planar semiconductor layer; 
 a first columnar semiconductor layer formed on the first planar semiconductor layer; 
 a first high concentration semiconductor layer formed on the lower region of the first columnar semiconductor layer and on the region of the first planar semiconductor layer below the first columnar semiconductor layer; 
 a second high concentration semiconductor layer of the same conductive type as the first high concentration semiconductor layer, formed on the upper region of the first columnar semiconductor layer; 
 a first gate insulating film formed on the sidewall of the first columnar semiconductor layer between the first high concentration semiconductor layer and the second high concentration semiconductor layer, so as to surround the first columnar semiconductor layer; 
 a first metal film formed on the first gate insulating film so as to surround the first gate insulating film; 
 a first semiconductor film formed on the first metal film so as to surround the first metal film; 
 a first gate electrode composed of the first metal film and the first semiconductor film; and 
 a first insulating film formed between the first gate electrode and the first planar semiconductor layer; 
   forming an eighth insulating film on the third structure; and   forming a second insulating film by etching the eighth insulating film in a sidewall shape so the eighth insulating film remains on the top surface of the first gate electrode and the upper sidewall of the first columnar semiconductor layer.   
     
     
         7 . A semiconductor device production method for producing a semiconductor device, the device comprising:
 a first planar semiconductor layer;   a first columnar semiconductor layer on the first planar semiconductor layer;   a first high concentration semiconductor layer on the first planar semiconductor layer and the lower region of the first columnar semiconductor layer;   a second high concentration semiconductor layer of the same conductive type as the first high concentration semiconductor layer, on the upper region of the first columnar semiconductor layer;   a first gate insulating film on the sidewall of the first columnar semiconductor layer between the first high concentration semiconductor layer and the second high concentration semiconductor layer, so as to surround the first columnar semiconductor layer;   a first metal film on the first gate insulating film so as to surround the first gate insulating film;   a first semiconductor film on the first metal film so as to surround the first metal film;   a first gate electrode composed of the first metal film and the first semiconductor film;   a first insulating film formed between the first gate electrode and the first planar semiconductor layer;   a second insulating film in sidewall shape contacting the upper sidewall of the first columnar semiconductor layer and the top surface of the first gate electrode so as to surround the upper region of the first columnar semiconductor layer;   a third insulating film in a sidewall shape contacting the sidewall of the first insulating film and the first gate electrode so as to surround the first gate electrode and the first insulating film;   a first contact above the first columnar semiconductor layer;   a second contact above the first planar semiconductor layer; and   a third contact above the first gate electrode;   wherein the first gate insulating film and the first metal film are covered by the first columnar semiconductor layer, the first semiconductor film, the first insulating film and the second insulating film;   the method comprising:   preparing a fourth structure having:
 a first planar semiconductor layer; 
 a first columnar semiconductor layer formed on the first planar semiconductor layer; 
 a first high concentration semiconductor layer formed on the lower region of the first columnar semiconductor layer and on the region of the first planar semiconductor layer below the first columnar semiconductor layer; 
 a second high concentration semiconductor layer of the same conductive type as the first high concentration semiconductor layer, formed on the upper region of the first columnar semiconductor layer; 
 a first gate insulating film formed on the sidewall of the first columnar semiconductor layer between the first high concentration semiconductor layer and the second high concentration semiconductor layer, so as to surround the first columnar semiconductor layer; 
 a first metal film formed on the first gate insulating film so as to surround the first gate insulating film; 
 a first semiconductor film formed on the first metal film so as to surround the first metal film; 
 a first gate electrode composed of the first metal film and the first semiconductor film; 
 a first insulating film formed between the first gate electrode and the first planar semiconductor layer; 
 a second insulating film formed in sidewall shape contacting the upper sidewall of the first columnar semiconductor layer and the top surface of the first gate electrode so as to surround the top region of the first columnar semiconductor layer; 
 a third insulating film formed in a sidewall shape contacting the sidewall of the first insulating film and the first gate electrode so as to surround the first gate electrode and the first insulating film; and 
 a first gate wire connected to the first gate electrode; 
   forming a contact stopper on the fourth structure;   forming an interlayer insulating film so as to bury the result of the contact stopper formation process;   forming a first resist on the interlayer insulating film, excluding on top of the first columnar semiconductor layer;   etching the interlayer insulating film and forming a first contact hole on the interlayer insulating film;   removing the first resist;   forming a second resist on the result of the first resist removal process, excluding on the first planar semiconductor layer and on the first gate wire;   etching the interlayer insulating film and forming a second contact hole on top of the first planar semiconductor layer and forming a third contact hole on top of the first gate wire, on the interlayer insulating film;   removing the second resist; and   forming a first contact positioned above the first columnar semiconductor layer, a second contact positioned above the first planar semiconductor layer and a third contact positioned above the first gate wire on the first contact hole, the second contact hole and the third contact hole, respectively.