Inventor · disambiguated record
Ko-Wei Lin
Also filed as: LIN KO-WEI
10 granted patents·4 pending applications·7 citations·filing 2009–2025
80Inventor score
Top patents by PatentIndex Score
14 records- 0186US10756128B2Integrated circuit device and method of fabricating integrated circuitUNITED MICROELECTRONICS CORP·Filed 2019·Granted Aug 25, 2020·5 cites·20 claims
- 0270US12237395B2High electron mobility transistor and method for forming the sameUNITED MICROELECTRONICS CORP·Filed 2022·Granted Feb 25, 2025·0 cites·18 claims
- 0368US9966425B1Method for fabricating a MIM capacitorUNITED MICROELECTRONICS CORP·Filed 2017·Granted May 8, 2018·1 cites·14 claims
- 0466US10153231B2Interconnect structure and fabrication method thereofUNITED MICROELECTRONICS CORP·Filed 2017·Granted Dec 11, 2018·1 cites·14 claims
- 0565US11856870B2MRAM structure and method of fabricating the sameUNITED MICROELECTRONICS CORP·Filed 2022·Granted Dec 26, 2023·0 cites·4 claims
- 0665US2025159916A1High electron mobility transistor and method for forming the sameUNITED MICROELECTRONICS CORP·Filed 2025·Application pending·0 cites
- 0749US10446489B2Interconnect structureUNITED MICROELECTRONICS CORP·Filed 2018·Granted Oct 15, 2019·0 cites·8 claims
- 0845US11404631B2MRAM structure and method of fabricating the sameUNITED MICROELECTRONICS CORP·Filed 2019·Granted Aug 2, 2022·0 cites·7 claims
- 0942US10079177B1Method for forming copper material over substrateUNITED MICROELECTRONICS CORP·Filed 2017·Granted Sep 18, 2018·0 cites·18 claims
- 1042US8089164B2Substrate having optional circuits and structure of flip chip bondingLIN KO-WEI·Filed 2009·Granted Jan 3, 2012·0 cites·17 claims
- 1139US8389869B2Circuit board having pad and chip package structure thereofLIN KO-WEI·Filed 2009·Granted Mar 5, 2013·0 cites·11 claims
- 1238US2018138263A1Semiconductor structure and method for forming the sameUNITED MICROELECTRONICS CORP·Filed 2016·Application pending·0 cites
- 1337US2014012943A1Method and storage apparatus for switching data transmission path to transmit dataYANG CHUNG-JEN·Filed 2013·Application pending·0 cites
- 1437US2020168450A1Method for fabricating interconnect of semiconductor deviceUNITED MICROELECTRONICS CORP·Filed 2018·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →