Inventor · disambiguated record
Long-Sheng Yeou
Also filed as: YEOU LONG-SHENG
15 granted patents·1 pending application·155 citations·filing 1996–2014
91Inventor score
Top patents by PatentIndex Score
16 records- 0195US8692382B2Chip packageYEN YU-LIN·Filed 2011·Granted Apr 8, 2014·23 cites·25 claims
- 0294US8525345B2Chip package and method for forming the sameYEN YU-LIN·Filed 2011·Granted Sep 3, 2013·21 cites·18 claims
- 0381US5840607AMethod of forming undoped/in-situ doped/undoped polysilicon sandwich for floating gate applicationTAIWAN SEMICONDUCTOR MFG·Filed 1996·Granted Nov 24, 1998·60 cites·19 claims
- 0479US8207615B2Chip package and method for fabricating the sameLOU BAI-YAO·Filed 2011·Granted Jun 26, 2012·6 cites·20 claims
- 0577US9559001B2Chip package and method for forming the sameYEN YU-LIN·Filed 2011·Granted Jan 31, 2017·5 cites·21 claims
- 0677US8698316B2Chip packageYEN YU-LIN·Filed 2011·Granted Apr 15, 2014·3 cites·26 claims
- 0773US9184092B2Chip package and method for forming the sameXINTEC INC·Filed 2014·Granted Nov 10, 2015·2 cites·32 claims
- 0873US8552565B2Chip package and method for forming the sameYEN YU-LIN·Filed 2011·Granted Oct 8, 2013·3 cites·17 claims
- 0970US8951836B2Chip package and method for forming the sameXINTEC INC·Filed 2014·Granted Feb 10, 2015·2 cites·20 claims
- 1064US5747382ATwo-step planarization process using chemical-mechanical polishing and reactive-ion-etchingTAIWAN SEMICONDUCTOR MFG·Filed 1996·Granted May 5, 1998·30 cites·23 claims
- 1155US9064950B2Fabrication method for a chip packageXINTEC INC·Filed 2013·Granted Jun 23, 2015·0 cites·17 claims
- 1248US8637970B2Chip package and fabrication method thereofTSAI CHIA-LUN·Filed 2010·Granted Jan 28, 2014·0 cites·15 claims
- 1342US9177862B2Semiconductor stack structure and fabrication method thereofXINTEC INC·Filed 2012·Granted Nov 3, 2015·0 cites·16 claims
- 1441US7815856B2Storage container for detecting presence of checmical elementsTAIWAN SEMICONDUCTOR MFG·Filed 2006·Granted Oct 19, 2010·0 cites·13 claims
- 1538US7521266B2Production and packaging control for repaired integrated circuitsTAIWAN SEMICONDUCTOR MFG·Filed 2006·Granted Apr 21, 2009·0 cites·19 claims
- 1630US2011291153A1Chip submount, chip package, and fabrication method thereofYang ming-kun·Filed 2011·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →