Inventor · disambiguated record
Maher Amer
Also filed as: AMER MAHER · AMER MAHER HN
32 granted patents·9 pending applications·332 citations·filing 1999–2022
97Inventor score
Top patents by PatentIndex Score
41 records- 0198US8738853B2Load reduction dual in-line memory module (LRDIMM) and method for programming the sameDIABLO TECHNOLOGIES INC·Filed 2013·Granted May 27, 2014·67 cites·20 claims
- 0296US8713379B2System and method of interfacing co-processors and input/output devices via a main memory systemTAKEFMAN MICHAEL L·Filed 2011·Granted Apr 29, 2014·80 cites·13 claims
- 0396US8452917B2Load reduction dual in-line memory module (LRDIMM) and method for programming the sameAMER MAHER·Filed 2009·Granted May 28, 2013·64 cites·29 claims
- 0491US9552175B2System and method for providing a command buffer in a memory systemDIABLO TECH INC·Filed 2014·Granted Jan 24, 2017·17 cites·32 claims
- 0589US10580465B2System and method for providing a configurable timing control for a memory systemRAMBUS INC·Filed 2018·Granted Mar 3, 2020·7 cites·10 claims
- 0688US9444495B2System and method of interfacing co-processors and input/output devices via a main memory systemDIABLO TECH INC·Filed 2015·Granted Sep 13, 2016·4 cites·37 claims
- 0787US7333422B2Optimized FFT/IFFT moduleZARBANA DIGITAL FUND LLC·Filed 2003·Granted Feb 19, 2008·45 cites·25 claims
- 0885US9015408B2Load reduction dual in-line memory module (LRDIMM) and method for programming the sameDIABLO TECHNOLOGIES INC·Filed 2014·Granted Apr 21, 2015·6 cites·20 claims
- 0979US11789662B2System and method of interfacing co-processors and input/output devices via a main memory systemRAMBUS INC·Filed 2022·Granted Oct 17, 2023·0 cites·19 claims
- 1079US11061841B2System and method for implementing a multi-threaded device driver in a computer systemRAMBUS INC·Filed 2020·Granted Jul 13, 2021·1 cites·20 claims
- 1177US10168954B2System and method of interfacing co-processors and input/output devices via a main memory systemRAMBUS INC·Filed 2016·Granted Jan 1, 2019·1 cites·14 claims
- 1274US11422749B2System and method of interfacing co-processors and input/output devices via a main memory systemRAMBUS INC·Filed 2021·Granted Aug 23, 2022·0 cites·20 claims
- 1371US10942682B2System and method of interfacing co-processors and input/output devices via a main memory systemRAMBUS INC·Filed 2020·Granted Mar 9, 2021·0 cites·20 claims
- 1471US9449651B2System and method for offsetting the data buffer latency of a device implementing a JEDEC standard DDR-4 LRDIMM chipsetDIABLO TECH INC·Filed 2015·Granted Sep 20, 2016·3 cites·20 claims
- 1571US8972805B2System and method of interfacing co-processors and input/output devices via a main memory systemDIABLO TECHNOLOGIES INC·Filed 2014·Granted Mar 3, 2015·1 cites·38 claims
- 1670US11640836B2System and method for providing a configurable timing control for a memory systemRAMBUS INC·Filed 2021·Granted May 2, 2023·0 cites·20 claims
- 1766US10725704B2System and method of interfacing co-processors and input/output devices via a main memory systemRAMBUS INC·Filed 2018·Granted Jul 28, 2020·0 cites·20 claims
- 1866US6728744B2Wide word multiplier using booth encodingMOSAID TECHNOLOGIES INC·Filed 2001·Granted Apr 27, 2004·11 cites·1 claims
- 1965US11062743B2System and method for providing a configurable timing control for a memory systemRAMBUS INC·Filed 2020·Granted Jul 13, 2021·0 cites·20 claims
- 2065US8107357B2Optimized FFT/IFFT moduleAMER MAHER·Filed 2007·Granted Jan 31, 2012·2 cites·27 claims
- 2163US9575908B2System and method for unlocking additional functions of a moduleDIABLO TECH INC·Filed 2014·Granted Feb 21, 2017·1 cites·14 claims
- 2262US7415112B2Parallel scrambler/descramblerZARBANA DIGITAL FUND LLC·Filed 2003·Granted Aug 19, 2008·7 cites·18 claims
- 2360US7765457B2Parallel convolutional encoderAMER MAHER·Filed 2007·Granted Jul 27, 2010·3 cites·16 claims
- 2459US10719466B2System and method for implementing a multi-threaded device driver in a computer systemRAMBUS INC·Filed 2018·Granted Jul 21, 2020·0 cites·14 claims
- 2557US2024139485A1Microneedle array with an interlocking featureUNIV WASHINGTON STATE·Filed 2022·Application pending·0 cites
- 2656US9465557B2Load reduction dual in-line memory module (LRDIMM) and method for programming the sameDIABLO TECH INC·Filed 2015·Granted Oct 11, 2016·0 cites·20 claims
- 2755US6766346B2System and method for computing a square of a numberMOSAID TECHNOLOGIES INC·Filed 2000·Granted Jul 20, 2004·4 cites·5 claims
- 2855US2016041933A1System and method for implementing a multi-threaded device driver in a computer systemDIABLO TECHNOLOGIES INC·Filed 2014·Application pending·0 cites
- 2951US9779020B2System and method for providing an address cache for memory map learningDIABLO TECH INC·Filed 2014·Granted Oct 3, 2017·0 cites·20 claims
- 3047US2015347151A1System and method for booting from a non-volatile memoryDIABLO TECHNOLOGIES INC·Filed 2014·Application pending·0 cites
- 3146US2016041917A1System and method for mirroring a volatile memory of a computer systemDIABLO TECHNOLOGIES INC·Filed 2014·Application pending·0 cites
- 3246US2019303316A1Hardware based virtual memory managementBioNym Consulting Inc·Filed 2019·Application pending·0 cites
- 3345US2015324281A1System and method of implementing an object storage device on a computer main memory systemDIABLO TECHNOLOGIES INC·Filed 2014·Application pending·0 cites
- 3444US7185268B2Memory system and method for use in trellis-based decodingAMER MAHER·Filed 2003·Granted Feb 27, 2007·2 cites·15 claims
- 3544US2015326684A1System and method of accessing and controlling a co-processor and/or input/output device via remote direct memory accessDIABLO TECHNOLOGIES INC·Filed 2014·Application pending·0 cites
- 3644US2015310898A1System and method for providing a configurable timing control for a memory systemDIABLO TECHNOLOGIES INC·Filed 2015·Application pending·0 cites
- 3743US7623585B2Systems and modules for use with trellis-based decodingAMER MAHER·Filed 2003·Granted Nov 24, 2009·2 cites·7 claims
- 3842US7917835B2Memory system and method for use in trellis-based decodingZARBANA DIGITAL FUND LLC·Filed 2007·Granted Mar 29, 2011·0 cites·5 claims
- 3940US2016371204A1System and method for offsetting the data buffer latency of a device implementing a jedec standard ddr-4 lrdimm chipsetDIABLO TECH INC·Filed 2016·Application pending·0 cites
- 4037US7318189B2Parallel convolutional encoderZARBANA DIGITAL FUND LLC·Filed 2003·Granted Jan 8, 2008·0 cites·12 claims
- 4136US6141289AStructure of random access memory formed of multibit cellsMOSAID TECHNOLOGIES INC·Filed 1999·Granted Oct 31, 2000·4 cites·10 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →