Inventor · disambiguated record
Michael Bertone
Also filed as: BERTONE MICHAEL · BERTONE MICHAEL S · BERTONE MICHAEL SEAN
37 granted patents·2 pending applications·492 citations·filing 2000–2022
97Inventor score
Files withCAVIUM INC13HEWLETT PACKARD DEVELOPMENT CO7CAVIUM LLC6MARVELL INT LTD4MARVELL ASIA PTE LTD3
Top patents by PatentIndex Score
39 records- 0196US7535907B2TCP engineCAVIUM NETWORKS INC·Filed 2005·Granted May 19, 2009·77 cites·16 claims
- 0295US11176055B1Managing potential faults for speculative page table accessMARVELL INT LTD·Filed 2019·Granted Nov 16, 2021·14 cites·22 claims
- 0393US9208103B2Translation bypass in multi-stage address translationCAVIUM INC·Filed 2013·Granted Dec 8, 2015·22 cites·28 claims
- 0492US6622225B1System for minimizing memory bank conflicts in a computer systemHEWLETT PACKARD DEVELOPMENT CO·Filed 2000·Granted Sep 16, 2003·83 cites·28 claims
- 0591US9639476B2Merged TLB structure for multiple sequential address translationsCAVIUM INC·Filed 2013·Granted May 2, 2017·15 cites·45 claims
- 0690US9268694B2Maintenance of cache and tags in a translation lookaside bufferCAVIUM INC·Filed 2013·Granted Feb 23, 2016·14 cites·21 claims
- 0788US7213087B1Mechanism to control the allocation of an N-source shared bufferHEWLETT PACKARD DEVELOPMENT CO·Filed 2000·Granted May 1, 2007·60 cites·22 claims
- 0888US6754739B1Computer resource management and allocation systemHEWLETT PACKARD DEVELOPMENT CO·Filed 2000·Granted Jun 22, 2004·50 cites·28 claims
- 0987US9645941B2Collapsed address translation with multiple page sizesCAVIUM INC·Filed 2013·Granted May 9, 2017·10 cites·28 claims
- 1084US10331500B2Managing fairness for lock and unlock operations using operation prioritizationCAVIUM LLC·Filed 2017·Granted Jun 25, 2019·4 cites·32 claims
- 1184US6654858B1Method for reducing directory writes and latency in a high performance, directory-based, coherency protocolHEWLETT PACKARD DEVELOPMENT CO·Filed 2000·Granted Nov 25, 2003·42 cites·18 claims
- 1281US10248420B2Managing lock and unlock operations using active spinningCAVIUM LLC·Filed 2017·Granted Apr 2, 2019·2 cites·20 claims
- 1381US10223279B2Managing virtual-address caches for multiple memory page sizesCAVIUM LLC·Filed 2016·Granted Mar 5, 2019·3 cites·24 claims
- 1480US10817300B2Managing commit order for an external instruction relative to two unissued queued instructionsMARVELL INT LTD·Filed 2018·Granted Oct 27, 2020·2 cites·10 claims
- 1580US6546465B1Chaining directory reads and writes to reduce DRAM bandwidth in a directory based CC-NUMA protocolHEWLETT PACKARD DEVELOPMENT CO·Filed 2000·Granted Apr 8, 2003·31 cites·18 claims
- 1678US11507379B2Managing load and store instructions for memory barrier handlingMARVELL WORLD TRADE LTD·Filed 2019·Granted Nov 22, 2022·2 cites·22 claims
- 1777US10599577B2Admission control for memory access requestsCAVIUM LLC·Filed 2016·Granted Mar 24, 2020·2 cites·24 claims
- 1877US9753859B2Input output value prediction with physical or virtual addressing for virtual environmentCAVIUM INC·Filed 2015·Granted Sep 5, 2017·2 cites·46 claims
- 1976US7099913B1Speculative directory writes in a directory based cache coherent nonuniform memory access protocolHEWLETT PACKARD DEVELOPMENT CO·Filed 2000·Granted Aug 29, 2006·23 cites·16 claims
- 2074US11573800B2Complex I/O value prediction for multiple values with physical or virtual addressesMARVELL ASIA PTE LTD·Filed 2018·Granted Feb 7, 2023·1 cites·23 claims
- 2173US11748107B2Complex I/O value prediction for multiple values with physical or virtual addressesMARVELL ASIA PTE LTD·Filed 2022·Granted Sep 5, 2023·0 cites·23 claims
- 2272US6662265B1Mechanism to track all open pages in a DRAM memory systemHEWLETT PACKARD DEVELOPMENT CO·Filed 2000·Granted Dec 9, 2003·17 cites·9 claims
- 2371US10846239B2Managing translation lookaside buffer entries based on associativity and page sizeMARVELL INT LTD·Filed 2018·Granted Nov 24, 2020·1 cites·21 claims
- 2471US9390023B2Method and apparatus for conditional storing of data using a compare-and-swap based approachCAVIUM INC·Filed 2013·Granted Jul 12, 2016·3 cites·21 claims
- 2571US8977944B2DRAM address protectionMAHESHWARI ASEEM·Filed 2011·Granted Mar 10, 2015·4 cites·30 claims
- 2670US9501243B2Method and apparatus for supporting wide operations using atomic sequencesCAVIUM INC·Filed 2013·Granted Nov 22, 2016·3 cites·22 claims
- 2767US9264385B2Messaging with flexible transmit orderingCAVIUM INC·Filed 2015·Granted Feb 16, 2016·1 cites·22 claims
- 2865US9906468B2Packet traffic control in a network processorKESSLER RICHARD E·Filed 2011·Granted Feb 27, 2018·2 cites·11 claims
- 2965US9065781B2Messaging with flexible transmit orderingCAVIUM INC·Filed 2013·Granted Jun 23, 2015·1 cites·22 claims
- 3064US9323715B2Method and apparatus to represent a processor context with fewer bitsCAVIUM INC·Filed 2013·Granted Apr 26, 2016·1 cites·24 claims
- 3162US12293190B2Managing commit order for an external instruction relative to queued instructionsMARVELL ASIA PTE LTD·Filed 2020·Granted May 6, 2025·0 cites·20 claims
- 3258US10599430B2Managing lock and unlock operations using operation predictionCAVIUM LLC·Filed 2017·Granted Mar 24, 2020·0 cites·20 claims
- 3358US10445096B2Managing lock and unlock operations using traffic prioritizationCAVIUM LLC·Filed 2017·Granted Oct 15, 2019·0 cites·20 claims
- 3455US10042778B2Collapsed address translation with multiple page sizesCAVIUM INC·Filed 2017·Granted Aug 7, 2018·0 cites·17 claims
- 3551US9239753B2DRAM address protectionCAVIUM INC·Filed 2015·Granted Jan 19, 2016·0 cites·22 claims
- 3649US9596193B2Messaging with flexible transmit orderingKESSLER RICHARD E·Filed 2011·Granted Mar 14, 2017·0 cites·18 claims
- 3748US2006059286A1Multi-core debuggerCAVIUM NETWORKS·Filed 2005·Application pending·0 cites
- 3847US11327759B2Managing low-level instructions and core interactions in multi-core processorsMARVELL INT LTD·Filed 2018·Granted May 10, 2022·0 cites·24 claims
- 3947US2015261535A1Method and apparatus for low latency exchange of data between a processor and coprocessorCAVIUM INC·Filed 2014·Application pending·0 cites
Join the waitlist — get patent alerts
Get an alert when Michael Bertone files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →