Inventor · disambiguated record
Michael C. Parris
Also filed as: HARDEE KIM C · PARRIS MICHAEL · PARRIS MICHAEL C · PARRIS MICHAEL CURTIS
64 granted patents·6 pending applications·1,046 citations·filing 1987–2016
99Inventor score
Top patents by PatentIndex Score
70 records- 0197US4853893AData storage device and method of using a ferroelectric capacitance dividerRAMTRON CORP·Filed 1987·Granted Aug 1, 1989·204 cites·20 claims
- 0296USRE44726EData inversion register technique for integrated circuit memory testingPARRIS MICHAEL C·Filed 2011·Granted Jan 21, 2014·19 cites·28 claims
- 0395US6262935B1Shift redundancy scheme for wordlines in memory circuitsUNITED MEMORIES INC·Filed 2000·Granted Jul 17, 2001·98 cites·23 claims
- 0490US7631233B2Data inversion register technique for integrated circuit memory testingUNITED MEMORIES INC·Filed 2007·Granted Dec 8, 2009·19 cites·15 claims
- 0589US4914627AOne transistor memory cell with programmable capacitance dividerRAMTRON CORP·Filed 1989·Granted Apr 3, 1990·60 cites·7 claims
- 0689US4893272AFerroelectric retention methodRAMTRON CORP·Filed 1988·Granted Jan 9, 1990·63 cites·6 claims
- 0786US7463054B1Data bus charge-sharing technique for integrated circuit devicesUNITED MEMORIES INC·Filed 2007·Granted Dec 9, 2008·13 cites·24 claims
- 0884US5331601ADRAM variable row selectUNITED MEMORIES INC·Filed 1993·Granted Jul 19, 1994·50 cites·19 claims
- 0983US8699263B2DRAM security erasePARRIS MICHAEL C·Filed 2011·Granted Apr 15, 2014·6 cites·32 claims
- 1083US7002874B1Dual word line mode for DRAMsSONY CORP·Filed 2005·Granted Feb 21, 2006·14 cites·20 claims
- 1183US6512394B1Technique for efficient logic power gating with data retention in integrated circuit devicesUNITED MEMORIES INC·Filed 2002·Granted Jan 28, 2003·31 cites·23 claims
- 1281US4918654ASRAM with programmable capacitance dividerRAMTRON CORP·Filed 1989·Granted Apr 17, 1990·41 cites·14 claims
- 1381US4910708ADram with programmable capacitance dividerRAMTRON CORP·Filed 1989·Granted Mar 20, 1990·40 cites·14 claims
- 1479US7649406B2Short-circuit charge-sharing technique for integrated circuit devicesUNITED MEMORIES INC·Filed 2007·Granted Jan 19, 2010·9 cites·11 claims
- 1578US9558808B2DRAM security eraseTESSERA INC·Filed 2016·Granted Jan 31, 2017·3 cites·14 claims
- 1678US5430680ADRAM having self-timed burst refresh modeUNITED MEMORIES INC·Filed 1993·Granted Jul 4, 1995·40 cites·22 claims
- 1777US7053692B2Powergate control using boosted and negative voltagesSONY CORP·Filed 2002·Granted May 30, 2006·18 cites·1 claims
- 1876US8692611B2Power boosting circuit for semiconductor packagingCRISP RICHARD DEWITT·Filed 2011·Granted Apr 8, 2014·4 cites·15 claims
- 1974US8976572B2DRAM security eraseTESSERA INC·Filed 2014·Granted Mar 10, 2015·3 cites·20 claims
- 2073US7298171B2Layout area efficient, high speed, dynamic multi-input exclusive or (XOR) and exclusive NOR (XNOR) logic gate circuit designs for integrated circuit devicesUNITED MEMORIES INC·Filed 2005·Granted Nov 20, 2007·7 cites·26 claims
- 2173US6643212B1Simultaneous function dynamic random access memory device techniqueUNITED MEMORIES INC·Filed 2002·Granted Nov 4, 2003·19 cites·26 claims
- 2273US6570799B1Precharge and reference voltage technique for dynamic random access memoriesUNITED MEMORIES INC·Filed 2002·Granted May 27, 2003·19 cites·30 claims
- 2372US6515926B1Shared sense amplifier driver technique for dynamic random access memories exhibiting improved write recovery timeUNITED MEMORIES INC·Filed 2002·Granted Feb 4, 2003·18 cites·29 claims
- 2470US8970003B2Embedded passive integrationPARRIS MICHAEL CURTIS·Filed 2011·Granted Mar 3, 2015·3 cites·23 claims
- 2570US8873302B2Common doped region with separate gate control for a logic compatible non-volatile memory cellFISCH DAVID EDWARD·Filed 2011·Granted Oct 28, 2014·3 cites·31 claims
- 2670US6738302B1Optimized read data amplifier and method for operating the same in conjunction with integrated circuit devices incorporating memory arraysUNITED MEMORIES INC·Filed 2003·Granted May 18, 2004·17 cites·25 claims
- 2768US7180363B2Powergating method and apparatusSONY CORP·Filed 2004·Granted Feb 20, 2007·12 cites·6 claims
- 2868US6597201B1Dynamic predecoder circuitry for memory circuitsMOSEL VITELIC INC·Filed 2000·Granted Jul 22, 2003·16 cites·6 claims
- 2967US8281219B2Error correction code (ECC) circuit test modePARRIS MICHAEL C·Filed 2007·Granted Oct 2, 2012·6 cites·20 claims
- 3064US7099234B2Low power sleep mode operation technique for dynamic random access memory (DRAM) devices and integrated circuit devices incorporating embedded DRAMSONY CORP·Filed 2004·Granted Aug 29, 2006·12 cites·25 claims
- 3164US6912168B2Non-contiguous masked refresh for an integrated circuit memorySONY CORP·Filed 2003·Granted Jun 28, 2005·12 cites·20 claims
- 3263US6732305B2Test interface for verification of high speed embedded synchronous dynamic random access memory (SDRAM) circuitryUNITED MEMORIES INC·Filed 2001·Granted May 4, 2004·12 cites·23 claims
- 3362US6160743ASelf-timed data amplifier and method for an integrated circuit memory deviceMOSEL VITELIC INC·Filed 2000·Granted Dec 12, 2000·12 cites·14 claims
- 3462US5671392AMemory device circuit and method for concurrently addressing columns of multiple banks of multi-bank memory arrayUNITED MEMORIES INC·Filed 1995·Granted Sep 23, 1997·28 cites·19 claims
- 3561US9158352B2Power boosting circuit for semiconductor packagingTESSERA INC·Filed 2014·Granted Oct 13, 2015·1 cites·19 claims
- 3660US6608797B1Automatic delay technique for early read and write operations in synchronous dynamic random access memoriesUNITED MEMORIES INC·Filed 2002·Granted Aug 19, 2003·10 cites·16 claims
- 3759US7506100B2Static random access memory (SRAM) compatible, high availability memory array and method employing synchronous dynamic random access memory (DRAM) in conjunction with a data cache and separate read and write registers and tag blocksUNITED MEMORIES INC·Filed 2005·Granted Mar 17, 2009·3 cites·19 claims
- 3857US6549470B2Small signal, low power read data bus driver for integrated circuit devices incorporating memory arraysUNITED MEMORIES INC·Filed 2001·Granted Apr 15, 2003·9 cites·14 claims
- 3956US9557364B2System and method for testing fuse blow reliability for integrated circuitsTESSERA INC·Filed 2014·Granted Jan 31, 2017·0 cites·13 claims
- 4056US5680362ACircuit and method for accessing memory cells of a memory deviceUNITED MEMORIES INC·Filed 1996·Granted Oct 21, 1997·31 cites·22 claims
- 4155US7609570B2Switched capacitor charge sharing technique for integrated circuit devices enabling signal generation of disparate selected signal valuesUNITED MEMORIES INC·Filed 2007·Granted Oct 27, 2009·3 cites·38 claims
- 4252US7154795B2Clock signal initiated precharge technique for active memory subarrays in dynamic random access memory (DRAM) devices and other integrated circuit devices incorporating embedded DRAMSONY CORP·Filed 2004·Granted Dec 26, 2006·6 cites·20 claims
- 4350US7580304B2Multiple bus charge sharingUNITED MEMORIES INC·Filed 2007·Granted Aug 25, 2009·0 cites·25 claims
- 4449US7606093B2Optimized charge sharing for data bus skew applicationsUNITED MEMORIES INC·Filed 2007·Granted Oct 20, 2009·0 cites·20 claims
- 4549US6657461B2System and method for high speed integrated circuit device testing utilizing a lower speed test environmentMOSEL VITELIC INC·Filed 2001·Granted Dec 2, 2003·4 cites·13 claims
- 4649US6501817B2Area efficient redundancy multiplexer circuit technique for integrated circuit devices providing significantly reduced parasitic capacitanceUNITED MEMORIES INC·Filed 2001·Granted Dec 31, 2002·4 cites·20 claims
- 4748US7586355B2Low skew clock distribution treeUNITED MEMORIES INC·Filed 2007·Granted Sep 8, 2009·1 cites·20 claims
- 4848US6744690B1Asynchronous input data path technique for increasing speed and reducing latency in integrated circuit devices incorporating dynamic random access memory (DRAM) arrays and embedded DRAMUNITED MEMORIES INC·Filed 2002·Granted Jun 1, 2004·5 cites·20 claims
- 4947US9299417B2DRAM security eraseTESSERA INC·Filed 2015·Granted Mar 29, 2016·0 cites·19 claims
- 5047US5763298ABond pad option for integrated circuitsUNITED MEMORIES INC·Filed 1997·Granted Jun 9, 1998·12 cites·2 claims
Showing the top 50 of 70 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →